M68ICS08GR datasheet(82/408 Pages) FREESCALE

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Analog-to-Digital Converter (ADC)

Technical Data

MC68HC908GR8 — Rev 4.0

Analog-to-Digital Converter (ADC)

MOTOROLA

5.4.2 Voltage Conversion

When the input voltage to the ADC equals VREFH, the ADC converts the

signal to $FF (full scale). If the input voltage equals VREFL, the ADC

converts it to $00. Input voltages between VREFH and VREFL are a

straight-line linear conversion. All other input voltages will result in $FF,

if greater than VREFH.

NOTE:

Inside the ADC module, the reference voltage, VREFH is connected to the

ADC analog power VDDAD; and VREFL is connected to the ADC analog

ground VDDAD. Therefore, the ADC input voltage should not exceed the

analog supply voltages

For operation, VDDAD should be tied to the same potential as VDD via

separate traces

5.4.3 Conversion Time

Conversion starts after a write to the ADSCR. One conversion will take

between 16 and 17 ADC clock cycles. The ADIVx and ADICLK bits

should be set to provide a 1 MHz ADC clock frequency.

5.4.4 Conversion

In continuous conversion mode, the ADC data register will be filled with

new data after each conversion. Data from the previous conversion will

be overwritten whether that data has been read or not. Conversions will

continue until the ADCO bit is cleared. The COCO/IDMAS bit is set after

the first conversion and will stay set until the next write of the ADC status

and control register or the next read of the ADC data register.

In single conversion mode, conversion begins with a write to the

ADSCR. Only one conversion occurs between writes to the ADSCR.

16 to17 ADC cycles

ADC frequency

Conversion time =

Number of bus cycles = conversion time x bus frequency

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