TNETX15AEPGE datasheet(39/79 Pages) TI1

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TNETX15AE

ADDRESS-LOOKUP DEVICE

SPWS041A – AUGUST 1997 – REVISED OCTOBER 1997

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

PRINCIPLES OF OPERATION

lookup algorithm (continued)

Table

2nd Level : 2N Tables

22N Threads

3rd Level : 23N Tables

Table

N = Number of bits compared

23N Threads

Figure 5. Lookup-Algorithm Table Hierarchy

For bit groups of five (gives table sizes of 32), and with five levels of table hierarchy, preassigning all possible

tables at initialization requires more RAM than is possible to attach to the TNETX15AE. Therefore, table

allocation occurs only when a new table is required as a result of discovering a bit pattern at any of the levels

previously unseen. This has several side effects – given the same address set, entering them into the table in

a different order yields different SRAM contents as the tables required are allocated from free space in a different

order; the pointer values written to the table entries to point to the next level in the hierarchy are dynamically

allocated. An address is in the table if there are valid entries at each level in the hierarchy (as each n-bit part

of the address is inspected) that continue all the way down to a leaf where the characteristics of that address

are stored. An address is not present in the table when there is a null pointer at any level of the decode.

Addresses that are sequential share all the intermediate pointers down to the address of the leaf. Addresses

with at least one bit different in each N-bit decode group occupy completely different tables. The worst-case

rating on the storage capacity of the TNETX15AE SRAM assumes that each address is different from all the

others by at least one bit in each decode group. This implies that each card is from a different manufacturer,

and the serial number of any card is not within 2N of any other card.

Since each table needs to compare 2N possible combinations, it requires 2N pointers. Each table has the format

shown in Table 5.

Table 5. Lookup-Algorithm Table Format

OFFSET

(BITS TO BE

COMPARED)

POINTERS

00000

To table x at next level

00001

To table y at next level

00010

To table z at next level

•

2N – 1

Only the pointers column of Table 5 occupies memory locations.

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