전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

W25X05CLZPIG 데이터시트(PDF) 41 Page - Winbond

부품명 W25X05CLZPIG
상세설명  2.5 / 3 / 3.3 V 512K / 1M / 2M-BIT SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL I/O SPI
PDF  51 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  WINBOND [Winbond]
홈페이지  http://www.winbond.com
Logo WINBOND - Winbond

W25X05CLZPIG 데이터시트(HTML) 41 Page - Winbond

Back Button W25X05CLZPIG Datasheet HTML 37Page - Winbond W25X05CLZPIG Datasheet HTML 38Page - Winbond W25X05CLZPIG Datasheet HTML 39Page - Winbond W25X05CLZPIG Datasheet HTML 40Page - Winbond W25X05CLZPIG Datasheet HTML 41Page - Winbond W25X05CLZPIG Datasheet HTML 42Page - Winbond W25X05CLZPIG Datasheet HTML 43Page - Winbond W25X05CLZPIG Datasheet HTML 44Page - Winbond W25X05CLZPIG Datasheet HTML 45Page - Winbond Next Button
Zoom Inzoom in Zoom Outzoom out
 41 / 51 page
background image
W25X05CL/10CL/20CL
Publication Release Date: March 23, 2012
- 41 -
Revision B
AC Electrical Characteristics (cont’d)
DESCRIPTION
SYMBOL
ALT
SPEC
UNIT
MIN
TYP
MAX
Output Hold Time
tCLQX
tHO
0
ns
/HOLD Active Setup Time relative to CLK
tHLCH
5
ns
/HOLD Active Hold Time relative to CLK
tCHHH
5
ns
/HOLD Not Active Setup Time relative to CLK
tHHCH
5
ns
/HOLD Not Active Hold Time relative to CLK
tCHHL
5
ns
/HOLD to Output Low-Z
tHHQX(2)
tLZ
7
ns
/HOLD to Output High-Z
tHLQZ(2)
tHZ
12
ns
Write Protect Setup Time Before /CS Low
tWHSL(3)
20
ns
Write Protect Hold Time After /CS High
tSHWL(3)
100
ns
/CS High to Power-down Mode
tDP(2)
3
µs
/CS High to Standby Mode without Electronic
Signature Read
tRES1(2)
3
µs
/CS High to Standby Mode with Electronic
Signature Read
tRES2(2)
1.8
µs
Write Status Register Time
tW
10
15
ms
Byte Program Time (First Byte) (4)
tBP1
15
30
µs
Additional Byte Program Time (After First Byte) (4)
tBP2
2.5
5
µs
Page Program Time
tPP
0.4
0.8
ms
Sector Erase Time (4KB)
tSE
30
300
ms
Block Erase Time (32KB)
tBE1
120
800
ms
Block Erase Time (64KB)
tBE2
150
1,000
ms
Chip Erase Time W25X20CL
tCE
0.5
2
s
Chip Erase Time W25X10CL & W25X05CL
tCE
0.25
1
s
Notes:
1.
Clock high + Clock low must be less than or equal to 1/fC.
2.
Value guaranteed by design and/or characterization, not 100% tested in production.
3.
Only applicable as a constraint for a Write Status Register instruction when SRP is set to 1.
4.
For multiple bytes after first byte within a page, tBPN = tBP1 + tBP2 * N (typical) and tBPN = tBP1 + tBP2 * N (max), where N = number
of bytes programmed.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com