STM32L151VD datasheet(104/140 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32L151xD STM32L152xD

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Doc ID 022027 Rev 6

SPI characteristics

Unless otherwise specified, the parameters given in the following table are derived from

tests performed under ambient temperature, fPCLKx frequency and VDD supply voltage

conditions summarized in Table 14.

Refer to Section 6.3.12: I/O current injection characteristics for more details on the

input/output alternate function characteristics (NSS, SCK, MOSI, MISO).

Table 57.

SPI characteristics(1)

Symbol

Parameter

Conditions

Min

Max(2)

Unit

fSCK

1/tc(SCK)

SPI clock frequency

Master mode

MHz

Slave mode

Slave transmitter

12(3)

tr(SCK)

(2)

tf(SCK)

(2)

SPI clock rise and fall time

Capacitive load: C = 30 pF

DuCy(SCK)

SPI slave input clock duty cycle

Slave mode

tsu(NSS)

NSS setup time

Slave mode

4tHCLK

th(NSS)

NSS hold time

Slave mode

2tHCLK

tw(SCKH)

(2)

tw(SCKL)

(2)

SCK high and low time

Master mode

tSCK/2−5tSCK/2+3

tsu(MI)

(2)

Data input setup time

Master mode

tsu(SI)

(2)

Slave mode

th(MI)

(2)

Data input hold time

Master mode

th(SI)

(2)

Slave mode

ta(SO)

(4)

Data output access time

Slave mode

3tHCLK

tv(SO)

(2)

Data output valid time

Slave mode

tv(MO)

(2)

Data output valid time

Master mode

6.5

th(SO)

(2)

Data output hold time

Slave mode

th(MO)

(2)

Master mode

0.5

The characteristics above are given for voltage range 1.

Based on characterization, not tested in production.

The maximum SPI clock frequency in slave transmitter mode is given for an SPI slave input clock duty cycle (DuCy(SCK))

ranging between 40 to 60%.

Min time is for the minimum time to drive the output and max time is for the maximum time to validate the data.

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