STM32L151VD datasheet(114/140 Pages) STMICROELECTRONICS

114 / 140 page

Electrical characteristics

STM32L151xD STM32L152xD

114/140

Doc ID 022027 Rev 6

Figure 35.

ADC accuracy characteristics

Figure 36.

Typical connection diagram using the ADC

Refer to Table 64 for the values of RAIN, RADC and CADC.

Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the

pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy

this, fADC should be reduced.

1LSBIDEAL

(1) Example of an actual transfer curve

(2) The ideal transfer curve

(3) End point correlation line

ET=Total Unadjusted Error: maximum deviation

between the actual and the ideal transfer curves.

EO=Offset Error: deviation between the first actual

transition and the first ideal one.

EG=Gain Error: deviation between the last ideal

transition and the last actual one.

ED=Differential Linearity Error: maximum deviation

between actual steps and the ideal one.

EL=Integral Linearity Error: maximum deviation

between any actual transition and the end point

correlation line.

4095

4094

4093

456

4093 4094 4095 4096

(1)

(2)

(3)

VDDA

VSSA

ai14395b

VREF+

4096

(or

depending on package)]

VDDA

4096

[1LSBIDEAL =

ai17856b

STM32L15xxx

VDD

AINx

IL± 50 nA

0.6 V

RAIN(1)

Cparasitic

VAIN

0.6 V

RADC(1)

12-bit

converter

CADC(1)

Sample and hold ADC

converter

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