전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

HM5259165B 데이터시트(PDF) 16 Page - Elpida Memory

부품명 HM5259165B
상세설명  512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 횞 16-bit 횞 4-bank/16-Mword 횞 8-bit 횞 4-bank /32-Mword 횞 4-bit 횞 4-bank PC/133, PC/100 SDRAM
PDF  63 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  ELPIDA [Elpida Memory]
홈페이지  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

HM5259165B 데이터시트(HTML) 16 Page - Elpida Memory

Back Button HM5259165B Datasheet HTML 12Page - Elpida Memory HM5259165B Datasheet HTML 13Page - Elpida Memory HM5259165B Datasheet HTML 14Page - Elpida Memory HM5259165B Datasheet HTML 15Page - Elpida Memory HM5259165B Datasheet HTML 16Page - Elpida Memory HM5259165B Datasheet HTML 17Page - Elpida Memory HM5259165B Datasheet HTML 18Page - Elpida Memory HM5259165B Datasheet HTML 19Page - Elpida Memory HM5259165B Datasheet HTML 20Page - Elpida Memory Next Button
Zoom Inzoom in Zoom Outzoom out
 16 / 63 page
background image
HM5259165B/HM5259805B/HM5259405B-75/A6
Data Sheet E0118H10
16
Current state
CS
RAS CAS WE
Address
Command
Operation
Write
H
×
×××
DESL
Continue burst to end
LH
H
H
×
NOP
Continue burst to end
L
H
L
H
BA, CA, A10 READ/READ A
Term burst and New read
L
H
L
L
BA, CA, A10 WRIT/WRIT A
Term burst and New write
L
L
H
H
BA, RA
ACTV
Other bank active
ILLEGAL on same bank*
3
L
L
H
L
BA, A10
PRE, PALL
Term burst write and
Precharge*
2
LL
LH
×
REF, SELF
ILLEGAL
L
L
L
L
MODE
MRS
ILLEGAL
Write with auto-
precharge
H
×
×××
DESL
Continue burst to end and
precharge
LH
H
H
×
NOP
Continue burst to end and
precharge
L
H
L
H
BA, CA, A10 READ/READ A
ILLEGAL*
4
L
H
L
L
BA, CA, A10 WRIT/WRIT A
ILLEGAL*
4
L
L
H
H
BA, RA
ACTV
Other bank active
ILLEGAL on same bank*
3
L
L
H
L
BA, A10
PRE, PALL
ILLEGAL*
4
LL
LH
×
REF, SELF
ILLEGAL
L
L
L
L
MODE
MRS
ILLEGAL
Refresh (auto-
refresh)
H
×
×××
DESL
Enter IDLE after t
RC
LH
H
H
×
NOP
Enter IDLE after t
RC
L
H
L
H
BA, CA, A10 READ/READ A
ILLEGAL*
5
L
H
L
L
BA, CA, A10 WRIT/WRIT A
ILLEGAL*
5
L
L
H
H
BA, RA
ACTV
ILLEGAL*
5
L
L
H
L
BA, A10
PRE, PALL
ILLEGAL*
5
LL
LH
×
REF, SELF
ILLEGAL
L
L
L
L
MODE
MRS
ILLEGAL
Notes: 1. H: V
IH.
L: V
IL.
×: V
IH or VIL.
The other combinations are inhibit.
2. An interval of t
DPL is required between the final valid data input and the precharge command.
3. If t
RRD is not satisfied, this operation is illegal.
4. Illegal for same bank, except for another bank.
5. Illegal for all banks.
6. NOP for same bank, except for another bank.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com