LXT970ATC datasheet(36/74 Pages) INTEL

36 / 74 page

LXT970A — Dual-Speed Fast Ethernet Transceiver

Datasheet

2.8.1.1

100X Preamble Handling

When the MAC asserts TX_EN, the PCS substitutes a /J/K symbol pair, also known as the Start of

Stream Delimiter or SSD, for the first two nibbles received across the MII. The PCS layer

continues to encode the remaining MII data, following Table 17, until TX_EN is de-asserted. It

then returns to supplying IDLE symbols to the line driver.

In the receive direction, the PCS layer performs the opposite function, substituting two preamble

nibbles for the SSD.

2.8.1.2

10T Preamble Handling

In 10BASE-T Mode, the LXT970A strips the entire preamble off of received packets. CRS is

asserted a few bit times after carrier is detected. RX_DV is held for the duration of the preamble.

When RX_DV is asserted, the very first two nibbles driven by the LXT970A are the SFD “5D” hex

followed by the body of the packet. In 10T loopback

the LXT970A loops back whatever the MAC transmits to it, including the preamble.

2.8.1.3

Data Errors (100X Only)

Figure 16 shows normal reception. When the LXT970A receives invalid symbols from the line, it

asserts RX_ER, as shown in Figure 17.

Figure 15. LXT970A Protocol Sublayers

Encoder/Decoder

Serializer/De-serializer

Scrambler/De-

scrambler

Link/Carrier Detect

PCS

Layer

PMA

Layer

PMD

Layer

MII Interface

PECL Interface

Fiber Transceiver

LXT970A

100BASETX

100BASE-FX

LXT970ATC 데이터시트(PDF) 36 Page - Intel Corporation