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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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RM0352 데이터시트(PDF) 135 Page - STMicroelectronics |
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RM0352 데이터시트(HTML) 135 Page - STMicroelectronics |
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135 / 138 page  DocID024647 Rev 1 135/138 RM0352 UART (universal asynchronous receive transmit) 137 UARTPeriphID3 register The UARTPeriphID3 register is hard coded and the fields in the register determine the reset value. Table 134 lists the register bit assignments. 12.6.15 PrimeCell identification registers, UARTPCellID0-3 The UARTPCellID0-3 registers are four 8-bit wide registers, that span address locations 0xFF0 - 0xFFC. The registers can conceptually be treated as a 32-bit register. The register is used as a standard cross-peripheral identification system. The UARTPCellID register is set to 0xB105F00D. The four, 8-bit PrimeCell identification registers are described in the following subsections: • UARTPCellID0 register • UARTPCellID1 register • UARTPCellID2 register on page 136 • UARTPCellID3 register on page 136. UARTPCellID0 register The UARTPCellID0 register is hard coded and the fields in the register determine the reset value. Table 135 lists the register bit assignments. UARTPCellID1 register The UARTPCellID1 register is hard coded and the fields in the register determine the reset value. Table 136 lists the register bit assignments. Table 134. UARTPeriphID3 register Bits Name Description 15:8 - RESERVED, read undefined, must read as zeros. 7:0 Configuration These bits read back as 0x00. Table 135. UARTPCellID0 register Bits Name Description 15:8 - RESERVED, read undefined, must read as zeros. 7:0 UARTPCellID0 These bits read back as 0x0D. Table 136. UARTPCellID1 register Bits Name Description 15:8 - RESERVED, read undefined, must read as zeros. 7:0 UARTPCellID1 These bits read back as 0xF0. |
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