| 전자부품 데이터시트 검색엔진 |
|
RM0352 데이터시트(PDF) 33 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
RM0352 데이터시트(HTML) 33 Page - STMicroelectronics |
|
33 / 138 page ![]() DocID024647 Rev 1 33/138 RM0352 Embedded Flash memory 137 The CMDDONE and CMDSTART bits are updated a few clock cycles after the requested command has been started by writing to the COMMAND register. Raw status The raw status register IRQRAW will always show the unmasked condition. Status The IRQSTAT register will show the masked version of the raw status register. Writing an one to the corresponding interrupt status bit will clear the interrupt status bit. Mask The mask bit in IRQMASK will mask the condition in the status register IRQSTAT and mask the generation of the interrupt (output flash_irq). 6.3.2 Data register The data register needs to be written with: • The desired value written to the Flash location. • The desired compare value for a (mass) read operation, the flag READOK will indicate if there was a match or not. For mass read, all read values must match for READOK. 6.3.3 Address register Address[13:0] = XADR[7:0] & YADR[5:0]. The 14-bit address is aligned on four bytes (32-bit written for each location). 4 READOK Mass read was OK. 5 FLNREADY Flash not ready (sleep). Table 19. Flash interrupt register Bit Name Description |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |