 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
ST9 데이터시트(PDF) 53 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST9 데이터시트(HTML) 53 Page - STMicroelectronics |
|
|
53 / 146 page  53/146 ST9 USER GUIDE being accidentally masked even in the case of a program failure. In any case, the Top Level Interrupt uses the third fixed vector at addresses 4 and 5 in program memory. As the name im- plies, it has a fixed priority that is higher than any other interrupt request. Though it does not clear the IEN bit when acknowledged, unlike all other interrupt requests, its service routine cannot be interrupted by any cause, including the Top Level Interrupt itself. The simplified block diagram is the following: Figure 21 . Top-Level Interrupt Simplified Block Diagram NMI pin Edge trigger event selection: one bit of EIVR Watchdog/NMI source selection: One bit of CICR Pending Bit One bit of NICR Top Level Interrupt to the core Watchdog timer End of Count one bit of EIVR Top Level not maskable Interrupt bit Interrupt enable: Two bits of CICR A detailed block diagram is provided in Section 7 |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
