AN4013 datasheet(29/37 Pages) STMICROELECTRONICS

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AN4013

Advanced features for motor control

4.3.3

Locking mechanism

The advanced timers registers and bits can be protected or locked in order to safeguard the

application using the locking mechanism by programming the LOCK bits in the BDTR

Note:

The LOCK bits can be written only once after the reset. Once the BDTR register has been

written, its content is frozen until the next reset.

Table 5. Behavior of timer outputs versus Break1 and Break2 inputs

Break input 1

Break input 2

OCxN output

OCx output

Active

Inactive

ON after deadtime

insertion

OFF

Inactive

Active

OFF

Active

ON after deadtime

insertion

OFF

Table 6. Locking levels

Level 1

LOCK Level 2(1)

1. LOCK Level 2 = LOCK Level 1 + CC polarity bits (CCxP/CCxNP bits in TIMx_CCER)

LOCK Level 3(2)

2. LOCK Level 3 = LOCK Level 2 + CC control bits (OCxM and OCxPE

Bits

CR2

OISx

CR2

OISx

CR2

OISx

OISxN

BDTR

DTG[7:0]

BDTR

DTG[7:0]

BDTR

DTG[7:0]

BKE

BKP

AOE

BK2E(3)

3. Bits present in STM32F30x and STM32F3x8 products lines.

OSSR

BK2P(3)

OSSI

BKF[3:0](3)

CCER

CCxP

CCER

CCxP

BK2F[3:0](3)

CCxNP

CCMRx

OCxM

OCxPE

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