RM0312 datasheet(159/275 Pages) STMICROELECTRONICS

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RM0312

16-bit general purpose timer (TIM2/TIM3)

170

17.7.21

Break register (TIMx_BKR)

Address offset: 0x14

Reset value: 0x00

654

3210

MOE

AOE

BKP

BKE

Reserved

OSSI

LOCK

Bit 7 MOE: Main output enable

This bit is cleared asynchronously by hardware as soon as the break input is active. It is set by

software or automatically depending on the AOE bit. It is acting only on the channels which are

configured in output.

0: OC outputs are disabled or forced to idle state.

1: OC outputs are enabled if their respective enable bits are set (CCxE in TIMx_CCERx registers).

See OC enable description for more details (Table 35: Output control bit for OCx channels with

break feature on page 160).

Bit 6 AOE: Automatic output enable

0: MOE can be set only by software

1: MOE can be set by software or automatically at the next update event (if the break input is not be

active)

Note: This bit can no longer be modified as long as LOCK level 1 has been programmed (LOCK bits

in the TIMx_BKR register).

Bit 5 BKP: Break polarity

0: Break input BKIN is active low

1: Break input BKIN is active high

Note: This bit can no longer be modified as long as LOCK level 1 has been programmed (LOCK bits

in the TIMx_BKR register).

Bit 4 BKE: Break enable

0: Break input (BKIN) disabled

1: Break input (BKIN) enabled

Note: This bit can no longer be modified as long as LOCK level 1 has been programmed (LOCK bits

in the TIMx_BKR register).

Bit 3 Reserved

Bit 2 OSSI: Off-State selection for idle mode

This bit is used when MOE=0 on channels configured as outputs.

See OC enable description for more details (Table 35: Output control bit for OCx channels with

break feature on page 160).

0: When inactive, OCx outputs are disabled (OCx enable output signal=0).

1: When inactive, OCx outputs are forced first with their idle level as soon as CCxE=1. OC enable

output signal=1).

Note: This bit can no longer be modified as soon as the LOCK level 2 has been programmed (LOCK

bits in the TIMx_BKR register).

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