RM0312 datasheet(47/275 Pages) STMICROELECTRONICS

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RM0312

Interrupt controller (ITC)

5.6

External interrupts

Ten interrupt vectors are dedicated to external Interrupt events:

•

EXTIB - 8 lines on Port B: PB[7:0]

•

EXTID - 8 lines on Port D: PD[7:0]

•

EXTI0 - 4 lines on Port A/B/C/D, bit 0: Px[0]

•

EXTI1 - 3 lines on Port A/B/D

•

EXTI2 - 3 lines on Port A/B/D

•

EXTI3 - 3 lines on Port A/B/D

•

EXTI4 - 3 lines on Port A/B/D

•

EXTI5 - 2 lines on Port B/D

•

EXTI6 - 3 lines on Port A/B/D

•

EXTI7 - 3 lines on Port A/B/D

To generate an interrupt, the corresponding GPIO port must be configured in input mode

with interrupts enabled. Refer to the register description in the GPIO chapter for details.

When an external interrupt occurs, the corresponding bit is set in the EXTI_SRx status

corresponding pending external interrupt.

The interrupt sensitivity must be configured in the external interrupt control register 1

(EXTI_CR1), external interrupt control register 2 (EXTI_CR2), and external interrupt control

5.7

Interrupt instructions

Table 12 shows the interrupt instructions.

Table 11. External interrupt sensitivity

GPIO port

Interrupt sensitivity

Configuration register

EXTI0 to EXTI3 on port A, B, C

and D

Falling edge and low level

Rising edge only

Falling edge only

Rising and falling edge

EXTI_CR1

EXTI4 to EXTI7 of port A, B, C

and D

EXTI_CR2

EXTIB and EXTID

EXTI_CR3

Table 12. Dedicated interrupt instruction set

Instruction

New description

Function/example

HALT

Entering Halt mode

IRET

Interrupt routine return

Pop CCR, A, X, Y, PC

JRM

Jump if I1:0=11 (level 3)

I1:0=11 ?

JRNM

Jump if I1:0<>11

I1:0<>11 ?

POP CC

Pop CCR from the stack

Memory => CCR

PUSH CC

Push CC on the stack

CC =>Memory

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