RM0312 datasheet(30/275 Pages) STMICROELECTRONICS

30 / 275 page

Flash program memory and data EEPROM

RM0312

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DocID022352 Rev 3

The following steps are required to disable write protection of the main program area:

Write a first 8-bit key into the FLASH_PUKR register. When this register is written for

the first time after a reset, the data bus content is not latched into the register, but

compared to the first hardware key value (0x56).

If the key available on the data bus is incorrect, the FLASH_PUKR register remains

locked until the next reset. Any new write commands sent to this address are

discarded.

If the first hardware key is correct when the FLASH_PUKR register is written for the

second time, the data bus content is still not latched into the register, but compared to

the second hardware key value (0xAE).

If the key available on the data bus is incorrect, the write protection on program

memory remains locked until the next reset. Any new write commands sent to this

address is discarded.

If the second hardware key is correct, the main program memory is write unprotected

and the PUL bit of the FLASH_IAPSR is set (see Section 4.8.5: Flash status register

(FLASH_IAPSR)) register.

Before starting programming, the application must verify that PUL bit is effectively set. The

application can choose, at any time, to disable again write access to the Flash program

memory by clearing the PUL bit.

Enabling write access to the DATA area

After a device reset, it is possible to disable the DATA area write protection by writing

consecutively two values called MASS keys to the FLASH_DUKR register (see

Section 4.8.6: Flash register map and reset values). These programmed keys are then

compared to two hardware key values:

•

First hardware key: 0b1010 1110 (0xAE)

•

Second hardware key: 0b0101 0110 (0x56)

The following steps are required to disable write protection of the DATA area:

Write a first 8-bit key into the FLASH_DUKR register. When this register is written for

the first time after a reset, the data bus content is not latched into the register, but

compared to the first hardware key value (0xAE).

If the key available on the data bus is incorrect, the application can re-enter two MASS

keys to try unprotecting the DATA area.

If the first hardware key is correct, the FLASH_DUKR register is programmed with the

second key. The data bus content is still not latched into the register, but compared to

the second hardware key value (0x56).

If the key available on the data bus is incorrect, the data EEPROM area remains write

protected until the next reset. Any new write command sent to this address is ignored.

If the second hardware key is correct, the DATA area is write unprotected and the DUL

bit of the FLASH_IAPSR register is set (see Section 4.8.5: Flash status register

(FLASH_IAPSR)).

Before starting programming, the application must verify that the DATA area is not write

protected by checking that the DUL bit is effectively set. The application can choose, at any

time, to disable again write access to the DATA area by clearing the DUL bit.

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