RM0312 datasheet(230/275 Pages) STMICROELECTRONICS

230 / 275 page

Universal synchronous/asynchronous receiver transmitter (USART)

RM0312

230/275

DocID022352 Rev 3

Procedure

Program the M bit in USART_CR1 to define the word length.

Program the number of STOP bits in USART_CR3.

Select the desired baud rate by programming the baud rate registers in the following

order:

USART_BRR2

USART_BRR1

Set the TEN bit in USART_CR2 to enable transmitter mode.

Write the data to send in the USART_DR register (this clears the TXE bit). Repeat this

for each data to be transmitted in case of single buffer.

Once the last data is written to the USART_DR register, wait until TC is set to ‘1’, which

indicates that the last data transmission is complete. This last step is required, for

instance, to avoid last data transmission corruption when disabling the USART or

entering Halt mode.

Single byte communication

Clearing the TXE bit is always performed by a write to the data register.

The TXE bit is set by hardware and it indicates:

•

The data has been moved from TDR to the shift register and the data transmission has

started.

•

The TDR register is empty.

•

The next data can be written in the USART_DR register without overwriting the

previous data.

This flag generates an interrupt if the TIEN bit is set.

When a transmission is taking place, a write instruction to the USART_DR register stores

the data in the TDR register. The data is copied in the shift register at the end of the current

transmission.

When no transmission is taking place, a write instruction to the USART_DR register places

the data directly in the shift register, the data transmission starts, and the TXE bit is

immediately set.

If a frame transmission is complete (after the stop bit) and the TXE bit is set, the TC bit is

set. An interrupt is generated if the TCIEN is set in the USART_CR2 register. After writing

the last data into the USART_DR register, it is mandatory to wait until TC is set to ‘1’ before

entering Halt mode or disabling the USART (see Figure 84: TC/TXE behavior when

transmitting).

Clearing the TC bit is performed by the following software sequence:

A read to the USART_SR register

A write to the USART_DR register

Note:

The TC bit can also be cleared by writing a ‘0’ to it. This clearing sequence is recommended

only for multibuffer communication.

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