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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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UPD75402ACT 데이터시트(PDF) 37 Page - NEC |
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UPD75402ACT 데이터시트(HTML) 37 Page - NEC |
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37 / 48 page  37 µPD75402A(A) Data Hold Timing (STOP Mode Release by RESET) VDD RESET VDDDR tSRS tOS STOP instruction execution STOP mode Data hold mode HALT mode Operating mode DATA HOLD CHARACTERISTICS AT LOW SUPPLY VOLTAGE IN DATA MEMORY STOP MODE (Ta = –40 to +85 ˚C) Parameter Data hold supply voltage Data hold supply current RESET setup time Oscillation settling time Symbol VDDDR IDDDR tSRS tOS Min. 2.0 0 Typ. 0.1 Max. 6.0 10 4 10 Unit V µA µs ms ms Conditions VDDDR = 2.0 V After VDD reaches the oscillation voltage range when the ceramic resonator is connected After VDD reaches the oscillation voltage range when the crystal is connected |
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