UPD75402ACT datasheet(12/48 Pages) NEC

12 / 48 page

µPD75402A(A)

MEMORY CONFIGURATION

• Program memory (ROM): 1920

× 8 bits (000H to 77FH)

• 000H and 001H : Vector table which contains the program start address after reset

• 002H to 009H

: Vector table which contains the program start addresses when interrupts occur

• Data memory

• Data area

: 64

× 4 bits (000H to 03FH)

• Peripheral hardware area: 128

× 4 bits (F80H to FFFH)

Fig. 4-1 Program Memory Map

00000

76543

Reset start address

(three high-order bits)

INTBT start address

(three high-order bits)

INT0 start address

(three high-order bits)

Reset start address (eight low-order bits)

INTBT start address (eight low-order bits)

INT0 start address (eight low-order bits)

INTCSI start address

(three high-order bits)

INTCSI start address (eight low-order bits)

Address

000H

001H

002H

003H

004H

005H

008H

009H

77FH

Entry address specified in

CALLF !faddr instruction

Branch address specified in

BRCB !caddr instruction

Relative branch address specified in

BR $addr instruction

–15 to –1,

+2 to +16

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