LTC1736 datasheet(10/28 Pages) LINER

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LTC1736

OPERATIO

(Refer to Functional Diagram)

INTVCC/EXTVCC Power

Power for the top and bottom MOSFET drivers and most

of the internal circuitry of the LTC1736 is derived from the

INTVCC pin. When the EXTVCC pin is left open, an internal

5.2V low dropout regulator supplies the INTVCC power

from VIN. If EXTVCC is raised above 4.7V, the internal

regulator is turned off and an internal switch connects

EXTVCC to INTVCC. This allows a high efficiency source,

such as the notebook main 5V system supply or a second-

ary output of the converter itself, to provide the INTVCC

power. Voltages up to 7V can be applied to EXTVCC for

additional gate drive capability.

To provide clean start-up and to protect the MOSFETs,

undervoltage lockout is used to keep both MOSFETs off

until the input voltage is above 3.5V.

VID Control

Bits VID0 to VID4 are logic inputs setting the output volt-

age using an internal 5-bit DAC as a feedback resistive

voltage divider. The output voltage can be set in 50mV or

25mV increments from 0.925V to 2.0V according to

Table 1. Pins VID0 to VID4 are internally pulled up to

VIDVCC.

PGOOD

A window comparator monitors the output voltage and its

open-drain output is pulled low when the divided down

output voltage is not within

±7.5%ofthereferencevoltage

of 0.8V.

SENSE

MAX

COSC Selection for Operating Frequency

and Synchronization

The choice of operating frequency and inductor value is a

trade-off between efficiency and component size. Low

frequency operation improves efficiency by reducing

MOSFET switching losses, both gate charge loss and

transition loss. However, lower frequency operation re-

quires more inductance for a given amount of ripple

current.

The LTC1736 uses a constant-frequency architecture with

the frequency determined by an external oscillator capaci-

tor COSC. Each time the topside MOSFET turns on, the

voltage on COSC is reset to ground. During the on-time

COSC is charged by a fixed current. When the voltage on the

capacitor reaches 1.19V, COSC is reset to ground. The

process then repeats.

The value of COSC is calculated from the desired operating

frequency assuming no external clock input on the FCB

pin:

APPLICATIO S I FOR ATIO

The basic LTC1736 application circuit is shown in

Figure 1 on the first page of this data sheet. External

component selection is driven by the load requirement

and begins with the selection of RSENSE. Once RSENSE is

known, COSC and L can be chosen. Next, the power MOS-

FETs and D1 are selected. The operating frequency and the

inductor are chosen based largely on the desired amount

of ripple current. Finally, CIN is selected for its ability to

handle the large RMS current into the converter and COUT

is chosen with low enough ESR to meet the output voltage

ripple and transient specifications. The circuit shown in

Figure 1 can be configured for operation up to an input

voltage of 28V (limited by the external MOSFETs).

RSENSE Selection For Output Current

RSENSE is chosen based on the required output current.

The LTC1736 current comparator has a maximum thresh-

old of 75mV/RSENSE and an input common mode range of

SGND to 1.1(INTVCC). The current comparator threshold

sets the peak of the inductor current, yielding a maximum

average output current IMAX equal to the peak value less

half the peak-to-peak ripple current,

∆IL.

Allowing a margin for variations in the LTC1736 and

external component values yields:

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