LTC1736 datasheet(13/28 Pages) LINER

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LTC1736

APPLICATIO S I FOR ATIO

COUT required ESR < 2.2 RSENSE

COUT > 1/(8fRSENSE)

The first condition relates to the ripple current into the ESR

of the output capacitance while the second term guaran-

tees that the output capacitance does not significantly

discharge during the operating frequency period due to

ripple current. The choice of using smaller output capaci-

tance increases the ripple voltage due to the discharging

term but can be compensated for by using capacitors of

very low ESR to maintain the ripple voltage at or below

50mV. The ITH pin OPTI-LOOP compensation compo-

nents can be optimized to provide stable, high perfor-

mance transient response regardless of the output capaci-

tors selected.

The selection of output capacitors for CPU or other appli-

cations with large load current transients is primarily

determined by the voltage tolerance specifications of the

load. The resistive component of the capacitor, ESR,

multiplied by the load current change plus any output

voltage ripple must be within the voltage tolerance of the

load (CPU).

The required ESR due to a load current step is:

RESR < ∆V/∆I

where

∆I is the change in current from full load to zero load

(or minimum load) and

∆V is the allowed voltage deviation

(not including any droop due to finite capacitance).

The amount of capacitance needed is determined by the

maximum energy stored in the inductor. The capacitance

must be sufficient to absorb the change in inductor current

when a high current to low current transition occurs. The

opposite load current transition is generally determined by

the control loop OPTI-LOOP components, so make sure

not to over compensate and slow down the response. The

minimum capacitance to assure the inductors’ energy is

adequately absorbed is:

OUT

()

∆

where

∆I is the change in load current.

Larger diodes can result in additional transition losses due

to their larger junction capacitance. The diode may be

omitted if the efficiency loss can be tolerated.

CIN Selection

In continuous mode, the source current of the top

N-channel MOSFET is a square wave of duty cycle VOUT/

VIN. To prevent large voltage transients, a low ESR input

capacitor sized for the maximum RMS current must be

used. The maximum RMS capacitor current is given by:

RMS

O MAX

OUT

≅









()

–1

This formula has a maximum at VIN = 2VOUT, where IRMS

= IOUT/2. This simple worst-case condition is commonly

used for design because even significant deviations do not

offer much relief. Note that capacitor manufacturers’

ripple current ratings are often based on only 2000 hours

of life. This makes it advisable to further derate the

capacitor, or to choose a capacitor rated at a higher

temperature than required. Several capacitors may also be

paralleled to meet size or height requirements in the

design. Always consult the manufacturer if there is any

question.

COUT Selection

The selection of COUT is primarily determined by the

effective series resistance (ESR) to minimize voltage ripple.

The output ripple (

∆VOUT) in continuous mode is deter-

mined by:

∆∆

I ESR

OUT

≈+









Where f = operating frequency, COUT = output capaci-

tance, and

∆IL = ripple current in the inductor. The output

ripple is highest at maximum input voltage since

∆IL

increases with input voltage. Typically, once the ESR

requirement for COUT has been met, the RMS current

rating generally far exceeds the IRIPPLE(P-P) requirement.

With

∆IL = 0.3IOUT(MAX) the output ripple will be less than

50mV at max VIN assuming:

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