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LTC1736 데이터시트(PDF) 3 Page - Linear Technology

부품명 LTC1736
상세설명  5-Bit Adjustable High Efficiency Synchronous Step-Down Switching Regulator
PDF  28 Pages
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제조업체  LINER [Linear Technology]
홈페이지  http://www.linear.com
Logo LINER - Linear Technology

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LTC1736
ELECTRICAL CHARACTERISTICS The q denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 15V, VRUN/SS = 5V unless otherwise noted.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formulas:
LTC1736CG, LTC1736IG: TJ = TA + (PD • 110°C/W)
Note 3: The LTC1736 is tested in a feedback loop that servos VFB to the
balance point for the error amplifier (VITH = 1.2V).
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 5: Oscillator frequency is tested by measuring the COSC charge
current (IOSC) and applying the formula:
Note 6: With all five VID inputs floating (or tied to VIDVCC) the VIDVCC
current is typically < 1
µA. However, the VIDVCC current will rise and be
approximately equal to the number of grounded VID input pins times
(VIDVCC – 0.6V)/40k. (See the Applications Information section for more
detail.)
Note 7: Each built-in pull-up resistor attached to the VID inputs also has a
series diode to allow input voltages higher than the VIDVCC supply without
damage or clamping. (See the Applications Information section for more
detail.)
Note 8: The minimum on-time condition corresponds to the on inductor
peak-to-peak ripple current
≥40% of IMAX (see minimum on-time
considerations in the Applications Information section).
Note 9: Rise and fall times are measured using 10% and 90% levels. Delay
times are measured using 50% levels.
f
CpF
I
I
OSC
OSC
CHG
DIS
=
+
+


8 477 10
11
11
11
1
.(
)
()
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
BG Transition Time:
(Note 9)
BG tr
Rise Time
CLOAD = 3300pF
50
90
ns
BG tf
Fall Time
CLOAD = 3300pF
40
80
ns
TG/BG T1D
Top Gate Off to Synchronous
CLOAD = 3300pF Each Driver
100
ns
Gate-On Delay Time
TG/BG T2D
Synchronous Gate Off to Top
CLOAD = 3300pF Each Driver
70
ns
Gate-On Delay Time
Internal VCC Regulator
VINTVCC
Internal VCC Voltage
6V < VIN < 30V, VEXTVCC = 4V
5.0
5.2
5.4
V
VLDO(INT)
Internal VCC Load Regulation
ICC = 0mA to 20mA, VEXTVCC = 4V
0.2
1
%
VLDO(EXT)
EXTVCC Drop Voltage
ICC = 20mA, VEXTVCC = 5V
130
200
mV
VEXTVCC
EXTVCC Switchover Voltage
ICC = 20mA, EXTVCC Ramping Positive
q
4.5
4.7
V
VEXTVCC(HYS)
EXTVCC Hysteresis
0.2
V
Oscillator
fOSC
Oscillator Frequency
(Note 5), COSC = 43pF
265
300
335
kHz
fH/fOSC
Maximum Sync Frequency Ratio
1.3
fFCB(SYNC)
FCB Pin Threshold For Sync
Ramping Negative
0.9
1.2
V
PGOOD Output
VPGL
PGOOD Voltage Low
IPGOOD = 2mA
110
200
mV
IPGOOD
PGOOD Leakage Current
VPGOOD = 5V
±1
µA
VPG
PGOOD Trip Level
VOSENSE with Respect to Set Output Voltage
VOSENSE Ramping Negative
– 6.0
– 7.5
– 9.5
%
VOSENSE Ramping Positive
6.0
7.5
9.5
%
VID Control
VIDVCC
VID Operating Supply Voltage
2.7
5.5
V
IVIDVCC
VID Supply Current
(Note 6) VIDVCC = 3.3V
0.01
5
µA
RVFB/VOSENSE
Resistance Between VOSENSE and VFB
10
k
RRATIO
Resistor Ratio Accuracy
Programmed from 0.925V to 2.00V
±0.05
%
RPULL-UP
VID0 to VID4 Pull-Up Resistance
(Note 7) VDIODE = 0.6V
40
k
VIDT
VID Input Voltage Threshold
0.4
1.0
1.6
V
IVIDLEAK
VID Input Leakage Current
(Note 7) VIDVCC < VID < 7V
0.01
±1
µA
VPULL-UP
VID Pull-Up Voltage
VIDVCC = 3.3V
2.8
V
VIDVCC = 5V
4.5
V



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