LTC1736 datasheet(20/28 Pages) LINER

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LTC1736

In order to prevent erratic operation if no external connec-

tions are made to the FCB pin, the FCB pin has a 0.17

µA

internal current source pulling the pin high. Remember to

include this current when choosing resistor values R3 and

R4.

The internal LTC1736 oscillator can be synchronized to an

external oscillator by clocking the FCB pin with a signal

above 1.5VP-P. When synchronized to an external fre-

quency, Burst Mode operation is disabled, but cycle skip-

ping is allowed at low load currents since current reversal

is inhibited. The bottom gate will come on every 10 clock

cycles to assure the boostrap cap, CB, is kept refreshed.

The rising edge of an external clock applied to the FCB pin

starts a new cycle.

The range of synchronization is from 0.9fO to 1.3fO, with

fO set by COSC. Attempting to synchronize to a higher

frequency than 1.3fO can result in inadequate slope

comensation and cause loop instability with high duty

cycles. If loop instability is observed while synchronized,

additional slope compensation can be obtained by simply

decreasing COSC.

The following table summarizes the possible states avail-

able on the FCB pin:

Table 2

FCB Pin

Condition

DC Voltage: 0V to 0.7V

Burst Disabled/Forced Continuous

Current Reversal Enabled

DC Voltage: > 0.9V

Burst Mode Operation, No Current Reversal

Feedback Resistors

Regulating a Secondary Winding

Ext Clock: (0V to VFCBSYNC)

Burst Mode Operation Disabled

(VFCBSYNC ≥ 1.5V) No Current Reversal

Efficiency Considerations

The percent efficiency of a switching regulator is equal to

the output power divided by the input power times 100%.

It is often useful to analyze individual losses to determine

what is limiting the efficiency and which change would

produce the most improvement. Percent efficiency can be

expressed as:

%Efficiency = 100% - (L1 + L2 + L3 + ...)

APPLICATIO S I FOR ATIO

where L1, L2, etc., are the individual losses as a percent-

age of input power.

Although all dissipative elements in the circuit produce

losses, four main sources usually account for most of the

losses in LTC1736 circuits: 1) LTC1736 VIN current, 2)

INTVCC current, 3) I2R losses, 4) Topside MOSFET transi-

tion losses.

1. The VIN current is the DC supply current given in the

electrical characteristics which excludes MOSFET driver

and control currents. VIN current results in a small

(< 0.1%) loss that increases with VIN.

2. INTVCC current is the sum of the MOSFET driver and

control currents. The MOSFET driver current results

from switching the gate capacitance of the power

MOSFETs. Each time a MOSFET gate is switched from

low to high to low again, a packet of charge dQ moves

from INTVCC to ground. The resulting dQ/dt is a current

out of INTVCC that is typically much larger than the

control circuit current. In continuous mode, IGATECHG =

f(QT + QB), where QT and QB are the gate charges of the

topside and bottom-side MOSFETs.

Supplying INTVCC power through the EXTVCC switch

input from an output-derived or other high efficiency

source will scale the VIN current required for the driver

and control circuits by a factor of (Duty Cycle)/(Effi-

ciency). For example, in a 15V to 1.8V application, 10mA

of INTVCC current results in approximately 1.2mA of VIN

current. This reduces the low current loss from 10% or

more (if the driver was powered directly from VIN)toonly

a few percent.

3. I2R Losses are predicted from the DC resistances of the

MOSFETs, inductor and current shunt. In continuous

mode the average output current flows through L and

RSENSE, but is “chopped” between the topside main

MOSFET and the synchronous MOSFET. If the two

MOSFETs have approximately the same RDS(ON), then

the resistance of one MOSFET can simply be summed

with the resistances of L and RSENSE to obtain I2R

losses. For example, if each RDS(ON) = 0.02Ω, RL =

0.03

Ω, and RSENSE= 0.01Ω, then the total resistance is

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