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ISO5451DW 데이터시트(PDF) 6 Page - Texas Instruments

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부품명 ISO5451DW
상세설명  High-CMTI 2.5-A / 5-A Isolated IGBT, MOSFET Gate Driver with Active Safety Features
PDF  38 Pages
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ISO5451DW 데이터시트(HTML) 6 Page - Texas Instruments

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ISO5451
SLLSEO1B – JUNE 2015 – REVISED DECEMBER 2015
www.ti.com
Electrical Characteristics (continued)
Over recommended operating conditions unless otherwise noted. All typical values are at TA = 25°C, VCC1 = 5 V,
VCC2 – GND2 = 15 V, GND2 – VEE2 = 8 V
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IN+ = low, IN- = high,
I(OUTL)
Low-level output peak current
3.4
5
A
VOUT = VEE2 + 15 V
ACTIVE MILLER CLAMP
V(CLP)
Low-level clamp voltage
I(CLP) = 20 mA
VEE2 + 0.015
VEE2 + 0.08
V
I(CLP)
Low-level clamp current
V(CLAMP) = VEE2 + 2.5 V
1.6
2.5
A
V(CLTH)
Clamp threshold voltage
1.6
2.1
2.5
V
SHORT CIRCUIT CLAMPING
Clamping voltage
IN+ = high, IN- = low, tCLP=10 µs,
V(CLP_OUT)
0.8
1.3
V
(VOUT - VCC2)
I(OUTH) = 500 mA
Clamping voltage
IN+ = high, IN- = low, tCLP=10 µs,
V(CLP_CLAMP)
1.3
V
(VCLP - VCC2)
I(CLP) = 500 mA
V(CLP_CLAMP)
Clamping voltage at CLAMP
IN+ = High, IN- = Low, I(CLP) = 20 mA
0.7
1.1
V
DESAT PROTECTION
I(CHG)
Blanking capacitor charge current
V(DESAT) - GND2 = 2 V
0.42
0.5
0.58
mA
I(DCHG)
Blanking capacitor discharge current
V(DESAT) - GND2 = 6 V
9
14
mA
DESAT threshold voltage with respect to
V(DSTH)
8.3
9
9.5
V
GND2
DESAT voltage with respect to GND2,
V(DSL)
0.4
1
V
when OUT is driven low
7.7 Switching Characteristics
Over recommended operating conditions unless otherwise noted. All typical values are at TA = 25°C, VCC1 = 5 V,
VCC2 – GND2 = 15 V, GND2 – VEE2 = 8 V
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tr
Output signal rise time
12
20
35
ns
tf
Output signal fall time
12
20
37
ns
tPLH, tPHL
Propagation Delay
76
110
ns
CLOAD = 1 nF, see Figure 35,
tsk-p
Pulse Skew |tPHL – tPLH|
20
ns
Figure 36 and Figure 37
tsk-pp
Part-to-part skew
30(1)
ns
tGF
Glitch filter on IN+, IN-, RST
20
30
40
ns
tDESAT (10%)
DESAT sense to 10% OUT delay
300
415
500
ns
tDESAT (GF)
DESAT glitch filter delay
330
ns
tDESAT (FLT)
DESAT sense to FLT-low delay
see Figure 37
2000
2420
ns
tLEB
Leading edge blanking time
see Figure 35 and Figure 36
330
400
500
ns
tGF(RSTFLT)
Glitch filter on RST for resetting FLT
300
800
ns
VI = VCC1/2 + 0.4 x sin (2πft),
CI
Input capacitance(2)
2
pF
f = 1 MHz, VCC1 = 5 V
CMTI
Common-mode transient immunity
VCM = 1500 V, see Figure 38
50
100
kV/
μs
(1)
Measured at same supply voltage and temperature condition
(2)
Measured from input pin to ground.
6
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