15

9, 16

11

10

12

13

14

IN-

IN+

RDY

RST

10k

10k

FLT

0.1 F

GND1

3V - 5V

10R

ISO5451

C

ISO5451

www.ti.com

SLLSEO1B – JUNE 2015 – REVISED DECEMBER 2015

10.2.2.2 FLT and RDY Pin Circuitry

There is 50k pull-up resistor internally on FLT and RDY pins. The FLT and RDY pin is an open-drain output. A

10-k

Ω pull-up resistor can be used to make it faster rise and to provide logic high when FLT and RDY is inactive,

as shown in Figure 44.

Fast common mode transients can inject noise and glitches on FLT and RDY pins due to parasitic coupling. This

is dependent on board layout. If required, additional capacitance (100 pF to 300 pF) can be included on the FLT

and RDY pins.

Figure 44. FLT and RDY Pin Circuitry for High CMTI

10.2.2.3 Driving the Control Inputs

The amount of common-mode transient immunity (CMTI) can be curtailed by the capacitive coupling from the

high-voltage output circuit to the low-voltage input side of the ISO5451. For maximum CMTI performance, the

digital control inputs, IN+ and IN-, must be actively driven by standard CMOS, push-pull drive circuits. This type

of low-impedance signal source provides active drive signals that prevent unwanted switching of the ISO5451

output under extreme common-mode transient conditions. Passive drive circuits, such as open-drain

configurations using pull-up resistors, must be avoided. There is a 20 ns glitch filter which can filter a glitch up to

20 ns on IN+ or IN-.

Copyright © 2015, Texas Instruments Incorporated

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Product Folder Links: ISO5451