MEC1322 datasheet(261/456 Pages) MICROCHIP

261 / 456 page

 2014 - 2015 Microchip Technology Inc.

DS00001719D-page 261

MEC1322

21.5

Power, Clocks and Reset

This section defines the Power, Clock, and Reset parameters of the block.

21.5.1

POWER DOMAINS

21.5.2

CLOCK INPUTS

SMBus 3 Controller

SMB_SDMA_Req

INPUT

DMA request control from SMBus Slave

channel.

SMB_SDMA_Term

INPUT

DMA termination control from SMBus

Slave channel.

SMB_SDMA_Done

OUTPUT

DMA termination control from DMA Con-

troller to Slave channel.

SMB_MDMA_Req

INPUT

DMA request control from SMBus Master

channel.

SMB_MDMA_Term

INPUT

DMA termination control from SMBus Mas-

ter channel.

SMB_MDMA_Done

OUTPUT

DMA termination control from DMA Con-

troller to Master channel.

SPI 0 Controller

SPI_SDMA_Req

INPUT

DMA request control from SPI TX channel.

SPI_SDMA_Term

INPUT

DMA termination control from SPI TX

channel. Not supported.

SPI_SDMA_Done

OUTPUT

DMA termination control from DMA Con-

troller to TX Channel. Not supported.

SPI_MDMA_Req

INPUT

DMA request control from SPI RX channel.

SPI_MDMA_Term

INPUT

DMA termination control from SPI RX

channel. Not supported.

SPI_MDMA_Done

OUTPUT

DMA termination control from DMA Con-

troller to RX channel. Not supported.

SPI 1 Controller

SPI_SDMA_Req

INPUT

DMA request control from SPI TX channel.

SPI_SDMA_Term

INPUT

DMA termination control from SPI TX

channel. Not supported.

SPI_SDMA_Done

OUTPUT

DMA termination control from DMA Con-

troller to TX Channel. Not supported.

SPI_MDMA_Req

INPUT

DMA request control from SPI RX channel.

SPI_MDMA_Term

INPUT

DMA termination control from SPI RX

channel. Not supported.

SPI_MDMA_Done

OUTPUT

DMA termination control from DMA Con-

troller to RX channel. Not supported.

TABLE 21-4:

POWER SOURCES

Name

Description

VCC1

This power well sources the registers and logic in this block.

TABLE 21-5:

CLOCK INPUTS

Name

Description

48 MHz Ring Oscillator

This clock signal drives selected logic (e.g., counters).

TABLE 21-3:

DMA CONTROLLER MASTER DEVICES SIGNAL LIST (CONTINUED)

Device Name

Dev

Num

(

21.5)

Device Signal Name

Direction

Description

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