MEC1322 datasheet(165/456 Pages) MICROCHIP

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 2014 - 2015 Microchip Technology Inc.

DS00001719D-page 165

MEC1322

FIGURE 12-3:

MAILBOX SIRQ AND SMI ROUTING

12.10.3

EC MAILBOX CONTROL

The HOST-to-EC Mailbox Register and EC-to-Host Mailbox Register are designed to pass commands between the host

and the EC. If enabled, these registers can generate interrupts to both the Host and the EC.

The two registers are not dual-ported, so the HOST BIOS and Keyboard BIOS must be designed to properly share these

registers. When the host performs a write of the HOST-to-EC Mailbox Register, an interrupt will be generated and seen

by the EC if unmasked. When the EC writes FFh to the Mailbox Register, the register resets to 00h, providing a simple

means for the EC to inform the host that an operation has been completed.

When the EC writes the EC-to-Host Mailbox Register, an SMI may be generated and seen by the host if unmasked.

When the Host CPU writes FFh to the register, the register resets to 00h, providing a simple means for the host to inform

that EC that an operation has been completed.

Note:

The protocol used to pass commands back and forth through the Mailbox Registers Interface is left to the

System designer. Microchip can provide an application example of working code in which the host uses the

Mailbox registers to gain access to all of the EC registers.

Mailbox Registers

MBX_Host_SMI

GPIO

nSMI

Pin Control Register

SIRQ Mapping

SIRQ

MBX_Host_SIRQ

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