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PEB2256HT 데이터시트(PDF) 59 Page - Infineon Technologies AG

부품명 PEB2256HT
상세설명  E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications
PDF  490 Pages
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제조업체  INFINEON [Infineon Technologies AG]
홈페이지  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

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FALC56 V1.2
PEB 2256
Functional Description E1/T1/J1
Data Sheet
59
2002-08-27
3.3.3
Master Clocking Unit
The FALC56 provides a flexible clocking unit, which references to any clock in the range
of 1.02 to 20 MHz supplied on pin MCLK.
The clocking unit has to be tuned to the selected reference frequency by setting the
global clock mode registers GCM(6:1) accordingly.
The calculation formulas for the appropriate register settings can be found in
Chapter 9.2 on page 217 or Chapter 10.2 on page 334. A calculation tool is available
to evaluate the required register settings automatically (see Chapter 13.3 on page 481).
All required clocks for E1 or T1/J1 operation are generated by this circuit internally. The
global setting depends only on the selected master clock frequency and is the same for
E1 and T1/J1 because both clock rates are provided simultaneously.
To meet the E1 requirements the MCLK reference clock must have an accuracy of better
than ± 32 ppm. The synthesized clock can be controlled on pins CLK1, CLK2, RCLK,
SCLKR and XCLK.
.
Figure 12
Flexible Master Clock Unit
Flexible Master Clock Unit
GCM1...GCM6
MCLK
E1 Clocks
T1 / J1
Clocks
F0116



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