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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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VX6854LC 데이터시트(PDF) 48 Page - STMicroelectronics |
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VX6854LC 데이터시트(HTML) 48 Page - STMicroelectronics |
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48 / 114 page  Register map VX6854LC 48/114 DocID027110 Rev 2 4.24 FIFO capability registers [0x1500 to 0x15FF] 4.25 CSI lane mode capability registers [0x1600 to 0x1602] 0x140A Hi matrix_element_BlueInGreen 16SR 00.00 RO Color matrix parameter for Blue in Green 0x140B Lo 0x140C Hi matrix_element_RedInBlue 16SR 00.00 RO Color matrix parameter for Red in Blue 0x140D Lo 0x140E Hi matrix_element_GreenInBlue 16SR 00.00 RO Color matrix parameter for Green in Blue 0x140F Lo 0x1410 Hi matrix_element_BlueInBlue 16SR 01.00 RO Color matrix parameter for Blue in Blue 0x1411 Lo Table 34. Color matrix registers [0x1400 to 0x14FF] (continued) Index Byte Register name Data type Default Type Comment Table 35. Fifo capability registers [0x1500 to 0x15FF] Index Byte Register name Data type Default Type Comment 0x1500 Hi fifo_size_pixels 16UI 07.00 RO VX6854LC has a fifo of 1792 pixels Note: This value should be 1023 pixels 0x1501 Lo Table 36. CSI lLane mode capability registers [0x1600 to 0x1602] Index Byte Register name Data type Default Type Comment 0x1600 ui_and_manual_dphy_ctrl_ca pability 8UI 03 RO CSI2 DPHY Control capability bit0: Automatic DPHY control supported bit1:UI-based DPHY control supported 0x1601 csi_lane_capability 8UI 01 RO One CSI-2 data lane supported 0x1602 csi_signallingmode_capability 8UI 07 RO VX6854LC supports: bit0: CCP2 data/clock bit1: CCP2 data/strobe bit2: CSI-2 |
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