| 전자부품 데이터시트 검색엔진 |
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TUSB3410 데이터시트(PDF) 53 Page - Texas Instruments |
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TUSB3410 데이터시트(HTML) 53 Page - Texas Instruments |
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53 / 92 page ![]() 7–7 CTS MSR MCR (4) LCTS (5) LDSR (6) LRI (7) LCD (5) RTS (4) DTR (6) LRI (7) LCD (2) LOOP DSR RI DCD RTS DTR Figure 7–1. MSR and MCR Registers in Loop-Back Mode 7.1.8 MSR: Modem-Status Register (Addr:FFA6) This register provides information about the current state of the control lines from the modem. 765 4 3 2 1 0 LCD LRI LDSR LCTS ∆CD TRI ∆DSR ∆CTS R/O R/O R/O R/O R/C R/C R/C R/C BIT NAME RESET FUNCTION 0 ∆CTS 0 This bit indicates that the CTS input has changed state. Cleared when the MCU writes a 1 to this bit. Writing a 0 has no effect. ∆CTS = 0 ∆CTS = 1 Indicates no change in the CTS input Indicates that the CTS input has changed state since the last time it was read. Clears when the MCU writes a 1. Writing a 0 has no effect. 1 ∆DSR 0 This bit indicates that the DSR input has changed state. Cleared when the MCU writes a 1 to this bit. Writing a 0 has no effect. ∆DSR = 0 ∆DSR = 1 Indicates no change in the DSR input Indicates that the DSR input has changed state since the last time it was read. Clears when the MCU writes a 1. Writing a 0 has no effect. 2 TRI 0 Trailing edge of the ring indicator. This bit indicates that the RI input has changed from low to high. This bit is cleared when the MCU writes a 1 to this bit. Writing a 0 has no effect. TRI = 0 TRI = 1 Indicates no applicable transition on the RI input Indicates that an applicable transition has occurred on the RI input. 3 ∆CD 0 This bit indicates that the CD input has changed state. Cleared when the MCU writes a 1 to this bit. Writing a 0 has no effect. ∆CD = 0 ∆CD = 1 Indicates no change in the CD input Indicates that the CD input has changed state since the last time it was read. 4 LCTS 0 During loopback, this bit reflects the status of MCR[1] (see Figure 7–1) LCTS = 0 LCTS = 1 CTS input is high CTS input is low 5 LDSR 0 During loop back, this bit reflects the status of MCR[0] (see Figure 7–1). LDSR = 0 LDSR= 1 DSR input is high DSR input is low 6 LRI 0 During loop back, this bit reflects the status of MCR[2] (see Figure 7–1). LRI = 0 LRI = 1 RI input is high RI input is low |
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