VT82C596 datasheet(89/96 Pages) ETC

89 / 96 page

VT82C596B

Revision 0.3 June 17, 1999

-83-

Electrical Specifications

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AC Timing Specifications

Table 6. AC Characteristics - PCI Cycle Timing

Parameter

Min

Max

Unit

Notes

AD[31:0] Setup Time to PCLK Rising

FRAME#,TRDY#,IRDY# Setup Time to PCLK Rising

CBE[3:0]#, STOP#,DEVSEL# Setup Time to PCLK Rising

PGNT# Setup Time to PCLK Rising

AD[31:0] Hold Time from PCLK Rising

FRAME#,TRDY#,IRDY# Hold Time from PCLK Rising

CBE[3:0]#, STOP#,DEVSEL# Hold Time from PCLK Rising

PGNT# Hold Time from PCLK Rising

TVD

AD[31:0] Valid Delay from PCLK Rising (address phase)

0pf on min, 50pf on max

TVD

AD[31:0] Valid Delay from PCLK Rising (data phase)

0pf on min, 50pf on max

TVD

FRAME#,TRDY#,IRDY# Valid Delay from PCLK Rising

0pf on min, 50pf on max

TVD

CBE[3:0]#, STOP#,DEVSEL# Valid Delay from PCLK Rising

0pf on min, 50pf on max

TVD

PREQ# Valid Delay from PCLK Rising

0pf on min, 50pf on max

TFD

FRAME#,TRDY#,IRDY# Float Delay from PCLK Rising

0pf on min, 50pf on max

TFD

CBE[3:0]#, STOP#,DEVSEL# Float Delay from PCLK Rising

0pf on min, 50pf on max

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