MCP3918A1T-ESLASHML datasheet(45/88 Pages) MICROCHIP

45 / 88 page

 2014 Microchip Technology Inc.

DS20005287A-page 45

MCP3918

FIGURE 6-3:

Read on a Single Register with 24-bit Format (WIDTH_DATA<1:0> = 01,

SPI Mode 0,0).

6.4

Writing to the Device

The first register written from the SDI pin to the device

is the one defined by the address (A<4:0>) given in the

Control byte. After this first register is fully transmitted,

if the CS pin is maintained logic low, the communication

continues without an additional Control byte and the

SDI pin transmits another register with the address

automatically incremented.

Two different write mode configurations for the address

increment can be defined through the WRITE bit in the

STATUSCOM register (see Section 6.5 “Continuous

Communications, Looping on Register Sets”

and

Table 9-2). The SDO pin stays in a high-impedance

state during a write communication. The data on SDI is

clocked into the MCP3918 on the rising edge of SCK.

The writing format for each register is defined in

Section 5.5 “ADC Output Coding”

. A write on an

undefined or non-writable address, such as the ADC

channel register address, will have no effect nor will it

increment the address counter.

FIGURE 6-4:

Write to a Single Register with 24-bit Format (WIDTH_CRC = 0, SPI Mode 1,1).

READ Communication (SPI mode 0,0)

Don’t care

SCK

SDI

SDO

DATA<23>

Hi-Z

Device latches SDI on rising edge

Device latches SDO on falling edge

High Z

WRITE Communication (SPI mode 1,1)

Don’t care

SCK

SDI

SDO

Hi-Z

Device latches SDI on rising edge

R/W

Don’t

care

DATA<0>

High Z

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