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GC2011A 데이터시트(PDF) 32 Page - Texas Instruments |
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GC2011A 데이터시트(HTML) 32 Page - Texas Instruments |
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32 / 50 page ![]() Texas Instruments Incorporated - 28 - GC2011A 3.3V DIGITAL FILTER CHIP SLWS129A This document contains information which may be changed at any time without notice 6.0 CONTROL REGISTERS The chip is configured and controlled through the use of 11 sixteen bit control registers. These registers are accessed for reading or writing using the control bus pins (CE, RE, WE, A[0:8], and C[0:15]) described in the previous section. The register names and their addresses are: ADDRESS NAME ADDRESS NAME 0 APATH_REG0 8 SNAP_REGA 1 APATH_REG1 9 SNAP_REGB 2 BPATH_REG0 10 SNAP_REGC 3 BPATH_REG1 11 ONE_SHOT 4 CASCADE_REG 12 NEW_MODES 5 COUNTER_REG 13 to 127 unused 6 GAIN_REG 128 to 255 Coefficient Registers 7 OUTPUT_REG 256 to 511 Snapram The following sections describe each of these registers. The type of each register bit is either R or R/W indicating whether the bit is read only or read/write. All bits are active high. The APATH_REG0, APATH_REG1, BPATH_REG0, BPATH_REG1, CASCADE_REG and OUTPUT_REG control register settings given in Section 3.0 will configure the chip into the most common modes of operation. This Section describes the meanings of the individual register bits used to set up those modes. |
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