전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

STLUX385ATR 데이터시트(PDF) 43 Page - STMicroelectronics

부품명 STLUX385ATR
상세설명  Digital controllers for lighting and power conversion applications with up to 6 programmable PWM generators, 96 MHz PLL, DALI
PDF  126 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STLUX385ATR 데이터시트(HTML) 43 Page - STMicroelectronics

Back Button STLUX385ATR Datasheet HTML 39Page - STMicroelectronics STLUX385ATR Datasheet HTML 40Page - STMicroelectronics STLUX385ATR Datasheet HTML 41Page - STMicroelectronics STLUX385ATR Datasheet HTML 42Page - STMicroelectronics STLUX385ATR Datasheet HTML 43Page - STMicroelectronics STLUX385ATR Datasheet HTML 44Page - STMicroelectronics STLUX385ATR Datasheet HTML 45Page - STMicroelectronics STLUX385ATR Datasheet HTML 46Page - STMicroelectronics STLUX385ATR Datasheet HTML 47Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 43 / 126 page
background image
DocID027870 Rev 1
43/126
STLUX
I/O multifunction signal configuration
126
Bit 7 - 6:
RFU reserved; in order to guarantee future compatibility, the bits are kept or set to 0
during register write operations.
MSC_IOMXP2 (Port P2 I/O MUX control register)
The Port1 I/O multifunction signal configurations register (for functionality description refer
to Section 7.5). This register is not available on STLUX285A and must be kept set to its
default value
Check device feature availability.
Bit 3 - 0:
RFU reserved; must be kept 0 during register writing for future compatibility
Bit 4:
Sel_P254 Port2 [5:4] I/O multiplexing scheme:
0: Port2 [5:4] are interconnected to I2C_scl and I2C_sda signals
1: Port2 [5:4] are interconnected to DIGIN [5:4] signals
Bit 6 - 5:
RFU reserved; in order to guarantee future compatibility, the bits are kept or set to 0
during register write operations.
Bit 7:
Sel_SWIM SWIM alternate function signal enable; this feature is active when the SWD
field of the register CFG_GCR is set.
0: SWIM pin is configured with GPIO0 [6] signal.
1: SWIM functionality is preserved.
Table 11. MSC_IOMXP2 (Port P2 I/O MUX control register)
Offset: 0x13 (indirect area)
Default value: 0xFF
76
5432
1
0
Sel_SWIM
RFU
Sel_P254
RFU
r/w
r
r/w
r



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com