| 전자부품 데이터시트 검색엔진 |
|
LAN8741Ai-EN 데이터시트(PDF) 91 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
LAN8741Ai-EN 데이터시트(HTML) 91 Page - Microchip Technology |
|
91 / 106 page ![]() 2013-2015 Microchip Technology Inc. DS00001988A-page 91 LAN8741A/LAN8741Ai 5.6.3.1 100 Mbps Internal Loopback MII Timing FIGURE 5-5: 100 MBPS INTERNAL LOOPBACK MII TIMING TABLE 5-11: 100 MBPS INTERNAL LOOPBACK MII TIMING VALUES Symbol Description Min. Typ. Max. Unit t1 TXCLK rising edge after TXEN assertion to RXDV assertion (100 Mbps internal loopback MII mode) 160 161 162 ns Note: The t1 measurement applies in MII mode when the Loopback bit of the Basic Control Register is set to “1” and a link has been established in 100 Mb full-duplex mode. The t1 measurement is taken from the first rising edge of TXCLK following assertion of TXEN to the rising edge of RXDV. TXCLK (OUTPUT) RXD[3:0] (OUTPUTS) TXEN (INPUT) t1 RXDV (OUTPUT) |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |