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LAN8741Ai-EN 데이터시트(PDF) 10 Page - Microchip Technology

부품명 LAN8741Ai-EN
상세설명  Small Footprint MII/RMII 10/100 Energy Efficient Ethernet Transceiver with HP Auto-MDIX and flexPWR짰 Technology
PDF  106 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
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LAN8741Ai-EN 데이터시트(HTML) 10 Page - Microchip Technology

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LAN8741A/LAN8741Ai
DS00001988A-page 10
2013-2015 Microchip Technology Inc.
Note 1: Configuration strap values are latched on power-on reset and system reset. Configuration straps are iden-
tified by an underlined symbol name. Signals that function as configuration straps must be augmented with
an external resistor when connected to a load. Refer to Section 3.7, "Configuration Straps" for additional
information.
1
Carrier Sense
(MII Mode)
CRS
VO8
(PD)
This signal indicates detection of a carrier in MII
mode.
TABLE 2-2:
LED PINS
Num Pins
Name
Symbol
Buffer Type
Description
1
LED 1
LED1
O12
Link activity LED indication. This pin is driven active
when a valid link is detected and blinks when activ-
ity is detected.
Note:
Refer to Section 3.8.1, "LEDs" for addi-
tional LED information.
Regulator Off
Configuration
Strap
REGOFF
IS
(PD)
This configuration strap is used to disable the inter-
nal 1.2 V regulator. When the regulator is disabled,
external 1.2 V must be supplied to VDDCR.
• When REGOFF is pulled high to VDD2A with
an external resistor, the internal regulator is
disabled.
• When REGOFF is floating or pulled low, the
internal regulator is enabled (default).
See Note 1 for more information on configuration
straps.
Note:
Refer to Section 3.7.4, "REGOFF: Inter-
nal +1.2 V Regulator Configuration" for
additional details.
1
LED 2
LED2
O12
Link speed LED indication. This pin is driven active
when the operating speed is 100 Mbps. It is
inactive when the operating speed is 10 Mbps or
during line isolation.
Note:
Refer to Section 3.8.1, "LEDs" for addi-
tional LED information.
nINT/TXER/
TXD4 Function
Select Configu-
ration Strap
nINTSEL
IS
(PU)
This configuration strap selects the mode of the
nINT/TXER/TXD4 pin.
• When nINTSEL is floated or pulled to VDD2A,
nINT is selected for operation on the
nINT/TXER/TXD4 pin (default).
• When nINTSEL is pulled low to VSS,
TXER/TXD4 is selected for operation on the
nINT/TXER/TXD4 pin.
See Note 1 for more information on configuration
straps.
Note:
Refer to See Section 3.8.1.2, "nINTSEL
and LED2 Polarity Selection" for addi-
tional information.
TABLE 2-1:
MII/RMII SIGNALS (CONTINUED)
Num Pins
Name
Symbol
Buffer Type
Description



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