LAN91C111 datasheet(45/125 Pages) MICROCHIP

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DS00002276A-page 45

LAN91C111

8.8

Bank 0 - Counter Register

Counts four parameters for MAC statistics. When any counter reaches 15 an interrupt is issued. All counters are cleared

when reading the register and do not wrap around beyond 15.

Each four bit counter is incremented every time the corresponding event, as defined in the EPH STATUS REGISTER

bit description, occurs. Note that the counters can only increment once per enqueued transmit packet, never faster, lim-

iting the rate of interrupts that can be generated by the counters. For example if a packet is successfully transmitted

after one collision the SINGLE COLLISION COUNT field is incremented by one. If a packet experiences between 2 to

16 collisions, the MULTIPLE COLLISION COUNT field is incremented by one. If a packet experiences deferral the

NUMBER OF DEFERRED TX field is incremented by one, even if the packet experienced multiple deferrals during its

collision retries.

The COUNTER REGISTER facilitates maintaining statistics in the AUTO RELEASE mode where no transmit interrupts

are generated on successful transmissions.

Reading the register in the transmit service routine will be enough to maintain statistics.

8.9

Bank 0 - Memory Information Register

FREE MEMORY AVAILABLE - This register can be read at any time to determine the amount of free memory. The reg-

ister defaults to the MEMORY SIZE upon POR (Power On Reset) or upon the RESET MMU command.

MEMORY SIZE - This register can be read to determine the total memory size.

All memory related information is represented in 2K * M byte units, where the multiplier M is 1 for LAN91C111.

OFFSET

NAME

TYPE

SYMBOL

COUNTER REGISTER

READ ONLY

ECR

HIGH

BYTE

NUMBER OF EXC. DEFFERED TX

NUMBER OF DEFFERED TX

000

LOW

BYTE

MULTIPLE COLLISION COUNT

SINGLE COLLISION COUNT

000

OFFSET

NAME

TYPE

SYMBOL

MEMORY INFORMATION

READ ONLY

MIR

HIGH

BYTE

FREE MEMORY AVAILABLE (IN BYTES * 2K * M)

000

001

LOW

BYTE

MEMORY SIZE (IN BYTES *2K * M)

000

001

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