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LAN91C111 데이터시트(PDF) 70 Page - Microchip Technology

부품명 LAN91C111
상세설명  10/100 Non-PCI Ethernet Single Chip MAC PHY
PDF  125 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN91C111 데이터시트(HTML) 70 Page - Microchip Technology

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 2011-2016 Microchip Technology Inc.
DS00002276A-page 71
LAN91C111
9.2.9
CAP_ANEG - AUTO-NEGOTIATION CAPABLE
Indicates the ability (‘1’) to perform ANEG or not (‘0’).
9.2.10
LINK - LINK STATUS
A ‘1’ indicates a valid Link and a ‘0’ and invalid Link. The ‘0’ condition is latched until this register is read.
9.2.11
JAB - JABBER DETECT
Jabber condition detected when ‘1’ for 10Mbps. ‘1’ latched until this register is read or the PHY is reset. Always ‘0’ for
100Mbps
9.2.12
EXREG - EXTENDED CAPABILITY REGISTER
‘1’ Indicates extended registers are implemented
9.3
Register 2&3. PHY Identifier Register
These two registers (offsets 2 and 3) provide a 32-bit value unique to the PHY.
9.4
Register 4. Auto-Negotiation Advertisement Register
This register control the values transmitted by the PHY to the remote partner when advertising its abilities.
9.4.1
NP - NEXT PAGE
A ‘1’ indicates the PHY wishes to exchange Next Page information.
9.4.2
ACK - ACKNOWLEDGE
It is used by the Auto-Negotiation function to indicate that a device has successfully received its Link Partner’s Link code
Word.
9.4.3
RF - REMOTE FAULT
When set, an advertisement frame will be sent with the corresponding bit set. This in turn will cause the PHY receiving
it to set the Remote Fault bit in its Status register
REG
Bits
Name
Default Value
R/W
Soft Reset
2
15-0
Company ID
0000000000010110
R
Retains Original Value
3
15-10
Company ID
111110
R
Retains Original Value
3
9-4
Manufacturer's ID
000100
R
Retains Original Value
3
3-0
Manufacturer's Revision #
- - - -
R
Retains Original Value
NP
ACK
RF
Reserved
Reserved
Reserved
T4
TX_FDX
RW
R
RW
RW
RW
RW
RW
RW
00
0
0
0
0
0
1
TX_HDX
10_FDX
10_HDX
Reserved
Reserved
Reserved
Reserved
CSMA
RW
RW
RW
RW
RW
RW
RW
RW
11
1
0
0
0
0
1



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