| 전자부품 데이터시트 검색엔진 |
|
LAN9211 데이터시트(PDF) 108 Page - SMSC Corporation |
|
|
|||||||||||||||||||||||||||||
LAN9211 데이터시트(HTML) 108 Page - SMSC Corporation |
|
108 / 147 page ![]() High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support Datasheet Revision 2.9 (03-01-12) 108 SMSC LAN9211 DATASHEET 5.4.2 ADDRH—MAC Address High Register The MAC Address High register contains the upper 16-bits of the physical address of the MAC. The contents of this register are optionally loaded from the EEPROM at power-on through the EEPROM Controller if a programmed EEPROM is detected. The least significant byte of this register (bits [7:0]) is loaded from address 0x05 of the EEPROM. The second byte (bits [15:8]) is loaded from address 0x06 of the EEPROM. Please refer to Section 4.6 for more information on the EEPROM. Section 5.4.3 details the byte ordering of the ADDRL and ADDRH registers with respect to the reception of the Ethernet physical address. Offset: 2 Attribute: R/W Default Value: 0000FFFFh Size: 32 bits BITS DESCRIPTION 31-16 Reserved 15-0 Physical Address [47:32]. This field contains the upper 16-bits (47:32) of the Physical Address of the LAN9211 device. The content of this field is undefined until loaded from the EEPROM at power- on. The host can update the contents of this field after the initialization process has completed. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |