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TDP158 데이터시트(PDF) 25 Page - Texas Instruments

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부품명 TDP158
상세설명  6-Gbps, AC-Coupled to TMDS or HDMI Redriver
PDF  55 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI1 - Texas Instruments

TDP158 데이터시트(HTML) 25 Page - Texas Instruments

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background image
1
10
9
8
7
6
5
4
3
2
24
21
22
23
25
26
27
28
29
30
I2C_EN
HPD_SRC
OUT_CLKp
OUT_CLKn
OUT_D0p
OUT_D0n
OUT_D1p
OUT_D1n
OUT_D2p
OUT_D2n
HPD_SNK
IN_CLKn
IN_CLKp
IN_D1n
IN_D1p
IN_D2n
IN_D2p
IN_D0n
IN_D0p
A1/EQ2
1
10
9
8
7
6
5
4
3
2
24
21
22
23
25
26
27
28
29
30
In Normal Working
Lane Swap
CLOCK LANE
DATA LANE0
DATA LANE1
DATA LANE2
CLOCK LANE
DATA LANE0
DATA LANE1
DATA LANE2
OUT_CLKp
OUT_CLKn
OUT_D0p
OUT_D0n
OUT_D1p
OUT_D1n
OUT_D2p
OUT_D2n
HPD_SNK
I2C_EN
HPD_SRC
IN_CLKn
IN_CLKp
IN_D1n
IN_D1p
IN_D2n
IN_D2p
IN_D0n
IN_D0p
A1/EQ2
25
TDP158
www.ti.com
SLLSEX2 – DECEMBER 2016
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
(1)
For Pin Control 0 = GND, 1 = VCC, Z = Floating (No Connect)
(2)
Individual Lane control is based upon the pin names with no swap
(3)
The CLK EQ in HDMI mode is controlled by register P0_Reg0D[2:1]
Figure 23. TDP158 Swap Function
8.3.5 Main Link Inputs
Standard Dual Mode DisplayPort terminations are integrated on all inputs with expected AC coupling capacitors
on board prior to input pins. External terminations are not required. Each input data channel contains an
equalizer to compensate for cable or board losses. The voltage at the input pins must be limited under the
absolute maximum ratings.
8.3.6 Receiver Equalizer
The equalizer is used to clean up inter-symbol interference (ISI) jitter/loss from the bandwidth-limited board
traces or cables. TDP158 supports fixed receiver equalizer by setting the A0/EQ1 and A1/EQ2 pins or through
I2C. Table 3 shows the pin strap settings and EQ values.
Table 3. Receiver EQ Programming and Values
Global
Independent Lane Control
RX EQ
(dB)
Pin Control (1)
I2C Control
I2C Control (2)
{EQ2,EQ1}
P0_Reg0D[6:3]
D2
P0_Reg4E[3:0]
D1
P0_Reg4E[7:4]
D3
P0_Reg4F[3:0]
CLK(2)(3)
P0_Reg4F[7:4]
2
2’b00
4’b0000
4’b0000
4’b0000
4’b0000
4’b0000
3
2’b0Z
4’b0001
4’b0001
4’b0001
4’b0001
4’b0001
4
4’b0010
4’b0010
4’b0010
4’b0010
4’b0010
5
2’b01
4’b0011
4’b0011
4’b0011
4’b0011
4’b0011
6.5
2’bZ0
4’b0100
4’b0100
4’b0100
4’b0100
4’b0100
7.5
4’b0101
4’b0101
4’b0101
4’b0101
4’b0101
8.5
2’bZZ
4’b0110
4’b0110
4’b0110
4’b0110
4’b0110
9
4’b0111
4’b0111
4’b0111
4’b0111
4’b0111
10
2’bZ1
4’b1000
4’b1000
4’b1000
4’b1000
4’b1000
11
2’b10
4’b1001
4’b1001
4’b1001
4’b1001
4’b1001



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