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TDP158 데이터시트(PDF) 8 Page - Texas Instruments |
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TDP158 데이터시트(HTML) 8 Page - Texas Instruments |
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8 / 55 page ![]() 8 TDP158 SLLSEX2 – DECEMBER 2016 www.ti.com Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated (1) The Typical rating is simulated at 3.3 V VCC and 1.1 V VDD and at 27°C temperature unless otherwise noted (2) The Maximum rating is simulated at 3.6 V VCC and 1.27 V VDD and at 85°C temperature unless otherwise noted 6.6 Electrical Characteristics, Differential Input over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP(1) MAX(2) UNIT DR(RX_DATA ) TMDS data lanes data rate 0.25 6 Gbps DR(RX_CLK) TMDS clock lanes clock rate 25 340 Mhz tRX_DUTY Input clock duty circle 40% 50% 60% tCLK_JIT Input clock jitter tolerance 0.3 Tbit tDATA_JIT Input data jitter tolerance Test the TTP2 See Figure 10 150 ps R(INT) Input differential termination impedance 80 100 120 Ω V(ITERM) Input Termination Voltage OE = H 0.7 V |
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