TDP158 datasheet(48/55 Pages) TI1

48 / 55 page

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Layer 1: TMDS signal layer

Layer 2: Ground Plane

Layer 3: Power Plane

Layer 4: Control signal layer

Layer 1: TMDS signal layer

Layer 2: Ground Plane

Layer 3: VCC Power Plane

Layer 6: Control signal layer

Layer 5: Ground Plane

Layer 4: VDD Power Plane

TDP158

SLLSEX2 – DECEMBER 2016

www.ti.com

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11 Layout

11.1 Layout Guidelines

For the TDP158 On a high-K board – It is required to solder the PowerPAD™ onto the thermal land to ground. A

thermal land is the area of solder-tinned-copper underneath the PowerPAD package. On a high-K board the

TDP158 can operate over the full temperature range by soldering the PowerPAD onto the thermal land. On a

low-K board, for the device to operate across the temperature range on a low-K board, a 1-oz Cu trace

connecting the GND pins to the thermal land must be used. A simulation shows RθJA = 100.84°C/W allowing 545

mW power dissipation at 70°C ambient temperature. A general PCB design guide for PowerPAD packages is

provided in the document SLMA002 . TI recommends using at a minimum a four layer stack up to accomplish a

low-EMI PCB design. TI recommends six layers as the TDP158 is a two voltage rail device.

•

Routing the high-speed TMDS traces on the top layer avoids the use of vias. (and the introduction of their

inductances) and allows for clean interconnects from the HDMI connectors to the Redriver inputs and outputs.

It is important to match the electrical length of these high speed traces to minimize both inter-pair and intra-

pair skew.

•

Placing a solid ground plane next to the high-speed single layer establishes controlled impedance for

transmission link interconnects and provides an excellent low –inductance path for the return current flow.

•

Placing a power plane next to the ground plane creates and additional high-frequency bypass capacitance.

•

Routing slower seed control signals on the bottom layer allows for greater flexibility as these signal links

usually have margin to tolerate discontinuities such as vias.

•

If an additional supply voltage plane or signal layer is needed, add a second power/ground plane system to

the stack to keep symmetry. This makes the stack mechanically stable and prevents it from warping. Also the

power and ground plane of each power system can be place closer together, thus increasing the high

frequency bypass capacitance significantly.

Figure 50. Recommended 4 – or 6 – Layer PCB Stack

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