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WM9713 데이터시트(PDF) 51 Page - Wolfson Microelectronics plc |
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WM9713 데이터시트(HTML) 51 Page - Wolfson Microelectronics plc |
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51 / 111 page ![]() Preliminary Technical Data WM9713L 1 PTD, March 2004, Rev 2.2 51 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 15 MUL 1 (Mute) Mute HPL 1: Mute (OFF) 0: No Mute (ON) 14 ZCL 0 Left zero cross enable 0: Change gain immediately 1: Change gain only on zero crossings, or after time-out 13:8 HPLVOL 000000 (0dB) HPL Volume 000000: 0dB (maximum) 000001: -1.5dB … (1.5dB steps) 011111: -46.5dB 1xxxxx: -46.5dB 7 MUR 1 (Mute) Mute HPR 1: Mute (OFF) 0: No Mute (ON) 6 ZCR 0 Right zero cross enable 0: Change gain immediately 1: Change gain only on zero crossings, or after time-out 04h Headphone Volume 5:0 HPRVOL 00000 (0dB) HPR Volume Similar to HPLVOL Table 32 HPL / HPR PGA Control MONO OUTPUT The MONO output (pin 31) is designed to drive a 16 Ω headphone load and can also be used as a line outputs. The available input sources are MONOMIX, INV1 and Vmid (see Table 33) REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 1Ch Output PGA Mux Select 15:14 MONO 00 (Vmid) MONO input source select 00: Vmid 01: no i/p (ZH if buffer disabled) 10: MONOMIX 11: INV1 Table 33 MONO PGA Input Source The signal volume on MONO can be independently adjusted under software control by writing to register 08h. When not in use MONO can be powered down using the Powerdown register bit MONO (register 3Eh, bit 13). To minimise pops and clicks when the PGA is powered down / up it is recommended that the Vmid input is selected during the power down / up cycle. This ensures the same DC level is maintained on the output pin throughout. |
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