WM9713 datasheet(79/111 Pages) WOLFSON

79 / 111 page

Preliminary Technical Data

WM9713L

PTD, March 2004, Rev 2.2

Note: GPIO7 (Pin 11) has an independent RESETB function. This must be disabled using RSTDIS (Register 5Ah, bit 8)

before using Pin 11 as a GPIO / PENDOWN.

The properties of the GPIOs are controlled through registers 4Ch to 52h, as shown below.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

4Ch

GCn

GPIO Pin Configuration

0: Output

1: Input

GC9-15 are always ‘1’

GPIO Pin Polarity / Type

Input (GCn=1)

Output (GCn=0)

4Eh

GPn

0: Active Low

1: Active High

[GIn = pin level XNOR

GPn]

0: Active High

1: Active low

50h

GSn

GPIO Pin Sticky

1: Sticky

0: Not Sticky

52h

GWn

GPIO Pin Wake-up

1: Wake Up (generate interrupts from this pin)

0: No wake-up (no interrupts generated)

54h

GIn

N/A

GPIO Pin Status

Read: Returns status of each GPIO pin

Write: Writing ‘0’ clears sticky bit

Table 61 GPIO Control

The following procedure is recommended for handling interrupts:

When the controller receives an interrupt, check register 54h. For each GPIO bit in descending order

of priority, check if the bit is ‘1’. If yes, execute corresponding interrupt routine, then write ‘0’ to

corresponding bit in 54h. If no, continue to next lower priority GPIO. After all GPIOs have been

checked, check if interrupt still present or no. If yes, repeat procedure. If no, then jump back to

process that ran before the interrupt.

If the system CPU cannot execute such an interrupt routine, it may be preferable to switch internal

signals (such as PENDOWN) directly onto the GPIO pins. However, in this case the interrupt signals

cannot be made sticky, and more GPIO pins are tied up both on the WM9713L and on the CPU.

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