S2-LP datasheet(59/90 Pages) STMICROELECTRONICS

59 / 90 page

S2-LP

Packet handler engine

DocID029944 Rev 1

59/90

7.9

CRC

Error detection is implemented by means of cyclic redundancy check codes. The CRC is

calculated over all fields excluding preamble and SYNC word. The length of the checksum

is programmable to 8, 16, 24 or 32 bits. The following standard CRC polynomials can be

selected:



mode 1: 8 bits: the poly is (0x07) X8+X2+X+1



mode 2: 16 bits: the poly is (0x8005) X16+X15+X2+1



mode 3: 16 bits: the poly is (0x1021) X16+X12+X5+1



mode 4: 24 bits: the poly is (0x864CFB)

X24+X23+X18+X17+X14+X11+X10+X7+X6+X5+X4+X3+X+1



mode 5: 32 bits the poly is (0x04C011BB7 ) x32+x26+ x23+ x22+ x16+ x12+ x11+ x10+ x8+

x7+ x5+ x4+ x2+x+1. 802.15.4g compatible

7.10

Data whitening

To prevent short repeating sequences (e.g., runs of 0's or 1's) that create spectral lines,

which may complicate symbol tracking at the receiver or interfere with other transmissions,

the device implements a data whitening feature. Data whitening is implemented with a

maximum length LFSR generating a pseudo-random binary sequence used to XOR data

before entering the encoding chain. The length of the LSFR is set to 9 bits. The pseudo-

random sequence is initialized to all 1's. When enabled through WHIT_EN register, the

data are scrambled before being transmitted in such a way that long sequences of zeros or

ones become very unlikely and physical layer algorithms perform better.

At the receiver end, the data are XOR-end with the same pseudo-random sequence.

Whitening is applied according to the following LFSR implementation. Data whitening is

always recommended.

Data whitening is applied on all fields excluding the preamble, the SYNC words and the

postamble for BASIC and STack packet format according to the following scheme:

Figure 10: data whitening scheme

S2-LP 데이터시트(PDF) 59 Page - STMicroelectronics