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S2-LP 데이터시트(PDF) 34 Page - STMicroelectronics

부품명 S2-LP
상세설명  Excellent receiver selectivity and blocking
PDF  90 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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S2-LP 데이터시트(HTML) 34 Page - STMicroelectronics

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DocID029944 Rev 1
Finally, a 2nd order Bessel analog filter can be used to smooth the output signal. The
bandwidth of this filter should be set according to the data rate used by setting the PA_FC
field of the register PA_CONFIG0 according to the following table:
Table 40: PA Bessel filter words
PA_FC bits
Cutoff Frequency (kHz)
Max Data rate (kbit/s)
00
12.5
16
01
25
32
10
50
62.5
11
100
125
The FIR ramping modes are used in a mutually exclusive way with the digital
ramping. When the digital ramping is used, the FIR ramping should be disabled.
Vice versa, if the FIR ramping is used, the digital one is not used.
5.4.3
Direct polar mode
The S2-LP allows the user to drive the SYNTH and the PA at a very low level. The byte
couples written in the TX_FIFO are sampled with a rate related to the DATARATE chip
setting (sampling rate = 8*DATARATE).
The first byte of the couple drives the frequency synthesizer to obtain an instantaneous
output frequency deviation given by the formula below:
Equation 8
– Frequency deviation in polar mode
���������������� = ����������������_���������������������������������������� ∗
����������������_����������������_������������������������
128
Where
����������������_���������������������������������������� is the frequency deviation programmed in the chip by the
registers MOD[1:0] (see Section 5.4.1: "Frequency modulation"),
����������������_����������������_������������������������ is the
first byte of the bytes couple sampled from the TX_FIFO.
The
����������������_����������������_������������������������ is interpreted as a 2-complement 8-bit number, thus it can be either
a positive or a negative value.
The instantaneous frequency is given by the formula:
Equation 9
– Instantaneous frequency in polar mode
���� = ��������_���������������������������������������� + ����������������
The second byte of the TX_FIFO couple drives the PA giving an instantaneous output
power.
The output power will be generated according to this value following the same code as the
PA_POWER registers (see Section 5.6.1: "PA configuration").
Figure 6: "Direct polar mode" shows how the byte couples are sampled from the TX FIFO
and sent to the SYNTH and PA blocks.



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