PC97307 datasheet(172/218 Pages) NSC

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Power Management (Logical Device 8)

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9.0

Power Management

(Logical Device 8)

9.1

POWER MANAGEMENT OPTIONS

The power management logical device provides configura-

tion options and control of the WATCHDOG feature.

9.1.1

Configuration Options

Registers in this logical device enable activation of other

logical devices, and set I/O characteristics for certain pins.

(See Section 9.2)

9.1.2

The WATCHDOG Feature

The WATCHDOG feature lets you implement power saving

strategies that power down the entire system if it is unused

for a defined period of time. This feature is especially attrac-

tive for battery-powered systems.

The WATCHDOG function generates the WDO output sig-

nal, which the system may use to implement power-down

activities.

The WATCHDOG function is activated by setting the

WATCHDOG Time-Out (WDTO) register to a value from 1

through 255 minutes. This defines a maximum countdown

period. The WATCHDOG timer starts with this value and

counts down to 0 unless a trigger event restarts the count.

The WATCHDOG Configuration register (WDCF) specifies

the trigger events that cause reloading of the WATCHDOG

time-out value into the timer and restart the countdown. See

“WATCHDOG Configuration Register (WDCF), Index 06h”

on page 175.

If the timer reaches zero, it is disabled, the WDO signal be-

comes active (low) and the host system can use WDO to

trigger power down.You can monitor the state of the WDO

signal at any time by reading bit 1 of the WATCHDOG Sta-

tus (WDST) register.

9.2

THE POWER MANAGEMENT REGISTERS

The power management registers are accessed via the

Power Management Index and Data registers, which are lo-

cated at base address and base address + 01h, respective-

ly. The base address is indicated by the Base Address

registers at indexes 60h and 61h of logical device 8, respec-

tively. See Table 2-20 on page 34.

Table 9-1 lists the power management registers.

TABLE 9-1. The Power Management Registers

9.2.1

Power Management Index Register,

Base Address + 00h

This read/write register is reset by hardware to 00h. It points

to one of the power management registers. Bits 7 through 3

are read only and return 00000 when read.

The data in the indicated register is accessed via the Power

Management Data register at the base address + 01h.

FIGURE 9-1. Power Management Index Register

Bitmap

Index Symbol

Description

Type

Base+0

Power Management Index Register R/W

Base+1

Power Management Data Register R/W

00h

FER1

Function Enable Register 1

R/W

01h

FER2

Function Enable Register 2

R/W

02h

PMC1

Power Management Control 1

R/W

03h

PMC2

Power Management Control 2

R/W

04h

PMC3

Power Management Control 3

R/W

05h

WDTO

WATCHDOG Time-Out Register

R/W

06h

WDCF WATCHDOG Conﬁguration Register R/W

07h

WDST

WATCHDOG Status Register

R/W

Index of a Power

Read Only

76543210

Reset

Required

Base Address

Power Management

Management Register

Index Register,

+ 00h

PC97307 데이터시트(PDF) 172 Page - National Semiconductor (TI)

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