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TNETV1644ZDU6 데이터시트(PDF) 228 Page - Texas Instruments |
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TNETV1644ZDU6 데이터시트(HTML) 228 Page - Texas Instruments |
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228 / 306 page ![]() 6.10.2.3 VPBE Electrical Data/Timing 1 PCLK 2 3 7 5 6 4 8 VPBECLK 4 8 TMS320DM6437 Digital Media Processor SPRS345D – NOVEMBER 2006 – REVISED JUNE 2008 www.ti.com Table 6-42. Timing Requirements for VPBE CLK Inputs(1)(2) (see Figure 6-23) -7/-6/-5/-4 -L/-Q6/-Q5/-Q4 NO. UNIT MIN MAX 1 tc(PCLK) Cycle time, PCLK 13.33 ns 2 tw(PCLKH) Pulse duration, PCLK high 0.4P ns 3 tw(PCLKL) Pulse duration, PCLK low 0.4P ns 4 tt(PCLK) Transition time, PCLK 7 ns 5 tc(VPBECLK) Cycle time, VPBECLK 13.33 ns 6 tw(VPBECLKH) Pulse duration, VPBECLK high 0.4V ns 7 tw(VPBECLKL) Pulse duration, VPBECLK low 0.4V ns 8 tt(VPBECLK) Transition time, VPBECLK 7 ns (1) P = PCLK period in ns. (2) V = VPBECLK period in ns. Figure 6-23. VPBE PCLK and VPBECLK Timing Peripheral Information and Electrical Specifications 228 Submit Documentation Feedback |
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