SPC560P50L5 datasheet(83/112 Pages) STMICROELECTRONICS

83 / 112 page

SPC560P44Lx, SPC560P50Lx

Electrical characteristics

Doc ID 14723 Rev 9

83/112

Calling f0 the bandwidth of the source signal (and as a consequence the cut-off frequency of

the anti-aliasing filter, fF), according to the Nyquist theorem the conversion rate fC must be

at least 2f0; it means that the constant time of the filter is greater than or at least equal to

twice the conversion period (TC). Again the conversion period TC is longer than the

sampling time TS, which is just a portion of it, even when fixed channel continuous

conversion mode is selected (fastest conversion rate at a specific channel): in conclusion it

is evident that the time constant of the filter RFCF is definitively much higher than the

sampling time TS, so the charge level on CS cannot be modified by the analog signal source

during the time in which the sampling switch is closed.

The considerations above lead to impose new constraints on the external circuit, to reduce

the accuracy error due to the voltage drop on CS; from the two charge balance equations

above, it is simple to derive Equation 11 between the ideal and real sampled voltage on CS:

Equation 11

From this formula, in the worst case (when VA is maximum, that is for instance 5 V),

assuming to accept a maximum error of half a count, a constraint is evident on CF value:

Equation 12

3.14.2

ADC conversion characteristics

------------

--------------------------------------------------------

2048 C

•

Table 33.

ADC conversion characteristics

Symbol

Parameter

Conditions(1)

Value

Unit

Min

Typ

Max

VINAN0 SR

ADC0 and shared ADC0/1

analog input voltage(2), (3)

—

VSS_HV_ADV0

− 0.3

—

VDD_HV_ADV0

+ 0.3

VINAN1 SR

ADC1 analog input voltage(2),

(4)

—

VSS_HV_ADV1

− 0.3

—

VDD_HV_ADV1

+ 0.3

fCK

SR —

ADC clock frequency

(depends on ADC

configuration)

(The duty cycle depends on

AD_clk(5) frequency)

—3(6)

—60

MHz

SR — Sampling frequency

—

1.53

MHz

tADC_S — D Sample time

(7)

fADC = 20 MHz,

INPSAMP = 3

125

—

fADC = 9 MHz,

INPSAMP = 255

—

28.2

µs

tADC_C — P Conversion time

(8)

fADC = 20 MHz

(9),

INPCMP = 1

0.650

—

µs

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