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ST7FOXU0 데이터시트(PDF) 95 Page - STMicroelectronics |
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ST7FOXU0 데이터시트(HTML) 95 Page - STMicroelectronics |
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95 / 123 page ![]() ST7FOXU0 Electrical characteristics 95/123 12.3 Operating conditions 12.3.1 General operating conditions TA = -40 to +85 °C unless otherwise specified. 12.3.2 Operating conditions with Low Voltage Detector (LVD) TA = -40 to 85 °C unless otherwise specified. , Table 42. General operating conditions Symbol Parameter Conditions Min Max Unit VDD Supply voltage fCPU = 8 MHz max. 4.5 5.5 V fCPU CPU clock frequency 4.5 V ≤ V DD≤5.5 V up to 8 MHz Table 43. Operating characteristics with LVD Symbol Parameter Conditions Min Typ Max Unit VIT+(LVD) Reset release threshold (VDD rise) 3.9 4.2 4.5 V VIT-(LVD) Reset generation threshold (VDD fall) 3.7 4.0 4.3 Vhys LVD voltage threshold hysteresis VIT+(LVD)-VIT-(LVD) 150 mV VtPOR VDD rise time rate (1)(2) 1. Not tested in production. The VDD rise time rate condition is needed to ensure a correct device power-on and LVD reset release. When the VDD slope is outside these values, the LVD may not release properly the reset of the MCU. 2. Use of LVD with capacitive power supply: with this type of power supply, if power cuts occur in the application, it is recommended to pull VDD down to 0 V to ensure optimum restart conditions. Refer to circuit example in Figure 39 on page 106. 2 µs/V IDD(LVD) LVD current consumption VDD = 5 V 80 140 µA |
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