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ST7MC1K2 데이터시트(PDF) 336 Page - STMicroelectronics

부품명 ST7MC1K2
상세설명  Clock, reset and supply management
PDF  371 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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ST7MC1K2 데이터시트(HTML) 336 Page - STMicroelectronics

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12.11
Communication interface characteristics
12.11.1
SPI - serial peripheral interface
Subject to general operating conditions for VDD, fOSC, and TA unless otherwise specified.
Refer to I/O port characteristics for more details on the input/output alternate function
characteristics (SS, SCK, MOSI, MISO).
Table 215.
SPI characteristics
Symbol
Parameter
Conditions
Min
Max
Unit
fSCK
1/tc(SCK)
SPI clock frequency
Master
fCPU = 8MHz
fCPU/128
0.0625
fCPU/4
2
MHz
Slave
fCPU = 8MHz
0
fCPU/2
4
tr(SCK)
tf(SCK)
SPI clock rise and fall
time
see Table 2 on page 23 for I/O port
pin description
tsu(SS)
(1)
1.
Data based on design simulation and/or characterization results, not tested in production.
SS setup time(2)
2.
Depends on fCPU. For example, if fCPU = 8 MHz, then TCPU = 1/fCPU = 125ns and tsu(SS) = 550ns.
Slave
(4 x TCPU) + 50
ns
th(SS)
(1)
SS hold time
Slave
120
tw(SCKH)
tw(SCKL)
SCK high and low time
Master
Slave
100
90
tsu(MI)
tsu(SI)
Data input setup time
Master
Slave
100
100
th(MI)
th(SI)
Data input hold time
Master
Slave
100
100
ta(SO)
Data output access
time
Slave
0
120
tdis(SO)
Data output disable
time
Slave
240
tv(SO)
Data output valid time
Slave (after enable edge)
120
th(SO)
Data output hold time
0
tv(MO)
Data output valid time
Master (after enable edge)
120
th(MO)
Data output hold time
0
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