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DSM2190F4V 데이터시트(PDF) 12 Page - STMicroelectronics |
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DSM2190F4V 데이터시트(HTML) 12 Page - STMicroelectronics |
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12 / 61 page ![]() DSM2190F4 12/61 TYPICAL MEMORY MAP There many different ways to place (or map) the addresses of DSM memory and I/O depending on system requirements. The DPLD allows complete mapping flexibility. Figure 7 shows one possible system memory map. In this case, the DSP will bootload (via DMA) the contents of Main Flash memory upon reset. The Secondary Flash memo- ry can be used for parameter storage or additional code storage. BMS and MSx are configured in the DSP to be combined into the BMS signal, allowing the DSP to access both Flash memories at runt- ime (after DMA boot). The DSP may execute code directly from the DSM and well as erase and write new code or data to DSM Flash. The nomenclature fs0..fs7 are designators for the individual sectors of Main Flash memory, 32K bytes each. csboot0..csboot3 are designators for the individual Secondary Flash memory seg- ments, 8K bytes each. csiop designates the DSM control register block. The designer may easily specify memory mapping in a point-and-click software environment using PSDsoft ExpressTM. |
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